Datasheet HMC7054 (Analog Devices) - 6
| Fabricante | Analog Devices |
| Descripción | Ka-Band HPA |
| Páginas / Página | 8 / 6 — HMC7054. Ka-Band HPa. Table 4. J2 BUC Connector Pin Out |
| Formato / tamaño de archivo | PDF / 283 Kb |
| Idioma del documento | Inglés |
HMC7054. Ka-Band HPa. Table 4. J2 BUC Connector Pin Out
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HMC7054
v03.0216
Ka-Band HPa Table 4. J2 BUC Connector Pin Out
Pin # Signal/Voltage Description 1 VDD_BUC BUC positive voltage supply s 2 VDD_BUC 3 VDD_BUC PA 4 21VDC BUC positive voltage supply to PLLs H 5 GND 6 SPARE 7 MDM_SELECT Modem input selection. High (3.3V): internal modem, Low (0V): external modem 8 BUC_LO_LOCK PLL lock indication. High (3.3V): unlocked, Low (0V): locked 9 TX_GAIN_CNTL_LE Gain control signal latch enable 10 GND RESERVED FOR VENDOR USE: 11 (RS232_RXD0) 12 BUC_HPA_12C_SDA I²C bus data 13 GND 14 GND 15 GND 16 GND 17 -5VDC BUC negative voltage supply 18 HPA_MUTE 19 GND Transmitter band selection. High (3.3V): commercial band 29-30GHz, 20 TX_BAND_SELECT Low (0V): military band 30-31GHz 21 TX_GAIN_CNTL_SERIN Gain control signal serial input 22 TX_GAIN_CNTL_CLK Gain control signal clock RESERVED FOR VENDOR USE: 23 (RS232_RXD0) 24 GND 25 BUC_HPA_12C_SCL I²C bus clock For price, delivery, and to place orders: Analog Devices, Inc., One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106
6
Phone: 781-329-4700 • Order online at www.analog.com Application Support: Phone: 1-800-ANALOG-D Document Outline Features Functional Block Diagram Electrical Specifications Small Signal Gain Output P1dB & PAE Saturated Output Power Linear Power (SRG) IP3 Absolute Maximum Ratings Outline Drawing Table 1. Absolute Maximum Ratings Table 2. J1 HPA Connector Pin Out Table 3. J2 BUC Connector Pin Out
v03.0216
Ka-Band HPa Table 4. J2 BUC Connector Pin Out
Pin # Signal/Voltage Description 1 VDD_BUC BUC positive voltage supply s 2 VDD_BUC 3 VDD_BUC PA 4 21VDC BUC positive voltage supply to PLLs H 5 GND 6 SPARE 7 MDM_SELECT Modem input selection. High (3.3V): internal modem, Low (0V): external modem 8 BUC_LO_LOCK PLL lock indication. High (3.3V): unlocked, Low (0V): locked 9 TX_GAIN_CNTL_LE Gain control signal latch enable 10 GND RESERVED FOR VENDOR USE: 11 (RS232_RXD0) 12 BUC_HPA_12C_SDA I²C bus data 13 GND 14 GND 15 GND 16 GND 17 -5VDC BUC negative voltage supply 18 HPA_MUTE 19 GND Transmitter band selection. High (3.3V): commercial band 29-30GHz, 20 TX_BAND_SELECT Low (0V): military band 30-31GHz 21 TX_GAIN_CNTL_SERIN Gain control signal serial input 22 TX_GAIN_CNTL_CLK Gain control signal clock RESERVED FOR VENDOR USE: 23 (RS232_RXD0) 24 GND 25 BUC_HPA_12C_SCL I²C bus clock For price, delivery, and to place orders: Analog Devices, Inc., One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106
6
Phone: 781-329-4700 • Order online at www.analog.com Application Support: Phone: 1-800-ANALOG-D Document Outline Features Functional Block Diagram Electrical Specifications Small Signal Gain Output P1dB & PAE Saturated Output Power Linear Power (SRG) IP3 Absolute Maximum Ratings Outline Drawing Table 1. Absolute Maximum Ratings Table 2. J1 HPA Connector Pin Out Table 3. J2 BUC Connector Pin Out