Datasheet HMC1087 (Analog Devices) - 9

FabricanteAnalog Devices
Descripción8 WATT GaN MMIC POWER AMPLIFIER, 2 - 20 GHz
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HMC1087. 8 WATT GaN MMIC POWER AMPLIFIER,. 2 - 20 GHz. Mounting & Bonding Techniques for GaN MMICs. Handling Precautions

HMC1087 8 WATT GaN MMIC POWER AMPLIFIER, 2 - 20 GHz Mounting & Bonding Techniques for GaN MMICs Handling Precautions

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HMC1087
v05.1217
8 WATT GaN MMIC POWER AMPLIFIER, 2 - 20 GHz Mounting & Bonding Techniques for GaN MMICs
The die should be eutectical y attached directly to the ground plane (see HMC general Handling, Mounting, Bonding Note). 0.102mm (0.004”) Thick GaN MMIC IP 50 Ohm Microstrip transmission lines on 0.127mm (5 mil) thick alumina H Wire Bond thin film substrates are recommended for bringing RF to and from the 0.076mm (0.003”) chip (Figure 1). If 0.254mm (10 mil) thick alumina thin film substrates must be used, the die should be raised 0.150mm (6 mils) so that the R - C surface of the die is coplanar with the surface of the substrate. One way E to accomplish this is to attach the 0.102mm (4 mil) thick die to a copper RF Ground Plane tungsten or CuMo heat spreader which is then attached to the thermal y W conductive ground plane (Figure 2). O Microstrip substrates should be placed as close to the die as possible in 0.127mm (0.005”) Thick Alumina order to minimize bond wire length. Typical die-to-substrate spacing is Thin Film Substrate 0.076mm to 0.152 mm (3 to 6 mils). Figure 1.
Handling Precautions
R & P A Fol ow these precautions to avoid permanent damage. 0.102mm (0.004”) Thick GaAs MMIC E
Storage:
All bare die are placed in either Waffle or Gel based ESD Wire Bond protective containers, and then sealed in an ESD protective bag for IN 0.076mm shipment. Once the sealed ESD protective bag has been opened, all die (0.003”) should be stored in a dry nitrogen environment.
Cleanliness:
Handle the chips in a clean environment. DO NOT attempt S - L to clean the chip using liquid cleaning systems. R RF Ground Plane
Static Sensitivity:
Fol ow ESD precautions to protect against ESD IE strikes. 0.150mm (0.005”) Thick Moly Tab
Transients:
Suppress instrument and bias supply transients while bias LIF 0.254mm (0.010”) Thick Alumina is applied. Use shielded signal and bias cables to minimize inductive Thin Film Substrate P pick-up. Figure 2. M
Die placement:
A heated vacuum col et (180°C) is the preferred method A of pick up. Ensure that the area of vacuum contact on the die is minimized to prevent cracking under differential pressure. All air bridges (if applicable) must be avoided during placement. Minimize impact forces applied to the die during auto-placement.
Mounting
The chip is back-metal ized with a minimum of 5 microns of gold and is the RF ground and thermal interface. It is recommended that the chip be die mounted with AuSn eutectic preforms. The mounting surface should be clean and flat.
Eutectic Reflow Process:
An 80/20 gold tin 0.5mil (13um) thick preform is recommended with a work surface tem- perature of 280°C. Limit exposure to temperatures above 300°C to 30 seconds maximum. A die bonder or furnace with 95% N / 5% H reducing atmosphere should be used. No organic flux should be used. Coefficient of thermal 2 2 expansion matching is critical for long term reliability.
Die Attach Inspection:
X-ray or acoustic scan is recommended.
Wire Bonding
Thermosonic ball or wedge bonding is the preferred interconnect technique. Gold wire must be used in a diameter appropriate for the pad size and number of bonds applied. Force, time and ultrasonics are critical parameters: opti- mize for a repeatable, high bond pull strength. Limit the die bond pad surface temperature to 200°C maximum. For price, delivery, and to place orders: Analog Devices, Inc., One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106 Phone: 781-329-4700 • Order online at www.analog.com
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Application Support: Phone: 1-800-ANALOG-D Document Outline Features General Description Functional Diagram Electrical Specifications Gain and Return Loss Gain vs. Temperature Input Return Loss vs. Temperature Output Return Loss vs. Temperature Gain vs. Bias Pout vs. Frequency Power Gain vs. Frequency Power Added Efficiency vs. Pin Pout vs. Pin P3dB vs. Temperature P3dB vs. DC Bias Psat vs. Temperature Psat vs. DC Bias IDS vs. Pin OIP3 vs. Frequency IM3 vs. Pout/Tone Reverse Isolation vs. Temperature Power Dissipation vs. Pin Second Harmonic Absolute Maximum Ratings[1] Outline Drawing Die Packaging Information Pad Descriptions Bookmark 28 Assembly Diagram Mounting & Bonding Techniques for GaN MMICs