Datasheet HMC8142 (Analog Devices) - 5
| Fabricante | Analog Devices |
| Descripción | 81 GHz to 86 GHz, E-Band Power Amplifier with Power Detector |
| Páginas / Página | 16 / 5 — Data Sheet. HMC8142. PIN CONFIGURATION AND FUNCTION DESCRIPTIONS. GND. … |
| Revisión | A |
| Formato / tamaño de archivo | PDF / 319 Kb |
| Idioma del documento | Inglés |
Data Sheet. HMC8142. PIN CONFIGURATION AND FUNCTION DESCRIPTIONS. GND. DD1. VDD2. VDD3. VDD4. RFOUT. RFIN. TOP VIEW. (Not to Scale). VGG1. VGG2
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Data Sheet HMC8142 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS 4 5 6 7 8 9 10 11 V GND DD1 GND VDD2 GND VDD3 GND VDD4 GND 3 12 GND HMC8142 2 RFOUT 13 RFIN TOP VIEW (Not to Scale) 1 GND GND 14 GND VGG1 GND VGG2 GND VGG3 GND VGG4 GND VREF VDET 25 24 23 22 21 20 19 18 17 16 15
02 0 5- 1342 Figure 2. Pad Configuration
Table 4. Pad Function Descriptions Pad No. Mnemonic Description
1, 3, 4, 6, 8, 10, 12, 14, GND Ground Connection (See Figure 3). 17, 19, 21, 23, 25 2 RFIN RF Input. AC couple RFIN and match it to 50 Ω (See Figure 4). 5, 7, 9, 11 VDD1 to VDD4 Drain Bias Voltage for the Power Amplifier (See Figure 5). 13 RFOUT RF Output. AC couple RFOUT and match it to 50 Ω (see Figure 6). 15 VDET Detector Voltage for the Power Detector (See Figure 7). VDET is the dc voltage representing the RF output power rectified by the diode, which is biased through an external resistor. Refer to the typical application circuit for the required external components (see Figure 40). 16 VREF Reference Voltage for the Power Detector (See Figure 7). VREF is the dc bias of diode biased through an external resistor used for the temperature compensation of VDET. Refer to the typical application circuit for the required external components (see Figure 40). 18, 20, 22, 24 VGG4 to VGG1 Gate Bias Voltage for the Power Amplifier (See Figure 8). Refer to the typical application circuit for the required external components (see Figure 40). Die Bottom GND Ground. The die bottom must be connected to the RF/dc ground (see Figure 3). Rev. A | Page 5 of 16 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS INTERFACE SCHEMATICS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION APPLICATIONS INFORMATION TYPICAL APPLICATION CIRCUIT ASSEMBLY DIAGRAM MOUNTING AND BONDING TECHNIQUES FOR MILLIMETERWAVE GAAS MMICS HANDLING PRECAUTIONS Storage Cleanliness Static Sensitivity Transients General Handling MOUNTING Eutectic Die Attach Epoxy Die Attach WIRE BONDING OUTLINE DIMENSIONS ORDERING GUIDE
Data Sheet HMC8142 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS 4 5 6 7 8 9 10 11 V GND DD1 GND VDD2 GND VDD3 GND VDD4 GND 3 12 GND HMC8142 2 RFOUT 13 RFIN TOP VIEW (Not to Scale) 1 GND GND 14 GND VGG1 GND VGG2 GND VGG3 GND VGG4 GND VREF VDET 25 24 23 22 21 20 19 18 17 16 15
02 0 5- 1342 Figure 2. Pad Configuration
Table 4. Pad Function Descriptions Pad No. Mnemonic Description
1, 3, 4, 6, 8, 10, 12, 14, GND Ground Connection (See Figure 3). 17, 19, 21, 23, 25 2 RFIN RF Input. AC couple RFIN and match it to 50 Ω (See Figure 4). 5, 7, 9, 11 VDD1 to VDD4 Drain Bias Voltage for the Power Amplifier (See Figure 5). 13 RFOUT RF Output. AC couple RFOUT and match it to 50 Ω (see Figure 6). 15 VDET Detector Voltage for the Power Detector (See Figure 7). VDET is the dc voltage representing the RF output power rectified by the diode, which is biased through an external resistor. Refer to the typical application circuit for the required external components (see Figure 40). 16 VREF Reference Voltage for the Power Detector (See Figure 7). VREF is the dc bias of diode biased through an external resistor used for the temperature compensation of VDET. Refer to the typical application circuit for the required external components (see Figure 40). 18, 20, 22, 24 VGG4 to VGG1 Gate Bias Voltage for the Power Amplifier (See Figure 8). Refer to the typical application circuit for the required external components (see Figure 40). Die Bottom GND Ground. The die bottom must be connected to the RF/dc ground (see Figure 3). Rev. A | Page 5 of 16 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS INTERFACE SCHEMATICS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION APPLICATIONS INFORMATION TYPICAL APPLICATION CIRCUIT ASSEMBLY DIAGRAM MOUNTING AND BONDING TECHNIQUES FOR MILLIMETERWAVE GAAS MMICS HANDLING PRECAUTIONS Storage Cleanliness Static Sensitivity Transients General Handling MOUNTING Eutectic Die Attach Epoxy Die Attach WIRE BONDING OUTLINE DIMENSIONS ORDERING GUIDE