IRG4PH40UD Vg GATE SIGNAL DEVICE UNDER TEST CURRENT D.U.T. VOLTAGE IN D.U.T. CURRENT IN D1 t0 t1 t2 Figure 18e. Macro Waveforms for Figure 18a's Test Circuit L D.U.T.RL=800V4 X I 1000V V * C @25°C c 0 - 800V 50V 6000µF 100V Figure 19. Clamped Inductive Load Test Circuit Figure 20. Pulsed Collector Current Test Circuit www.irf.com 9