Datasheet NDS8947 (Fairchild)
| Fabricante | Fairchild |
| Descripción | Dual P-Channel Enhancement Mode Field Effect Transistor |
| Páginas / Página | 7 / 1 — NDS8947. Dual P-Channel Enhancement Mode Field Effect Transistor. General … |
| Formato / tamaño de archivo | PDF / 204 Kb |
| Idioma del documento | Inglés |
NDS8947. Dual P-Channel Enhancement Mode Field Effect Transistor. General Description. Features. Absolute Maximum Ratings. Symbol
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March 1996
NDS8947 Dual P-Channel Enhancement Mode Field Effect Transistor General Description Features
These P-Channel enhancement mode power field effect -4A, -30V. R = 0.065Ω @ V = -10V DS(ON) GS transistors are produced using Fairchild's proprietary, high cell R = 0.1Ω @ V = -4.5V. density, DMOS technology. This very high density process is DS(ON) GS especially tailored to minimize on-state resistance and provide High density cell design for extremely low R . DS(ON) superior switching performance. These devices are particularly suited for low voltage applications such as notebook computer High power and current handling capability in a widely used power management and other battery powered circuits where surface mount package. fast switching, low in-line power loss, and resistance to Dual MOSFET in surface mount package. transients are needed. ________________________________________________________________________________ 5 4 6 3 7 2 8 1
Absolute Maximum Ratings
T = 25°C unless otherwise noted A
Symbol Parameter NDS8947 Units
V Drain-Source Voltage -30 V DSS V Gate-Source Voltage -20 V GSS I Drain Current - Continuous D (Note 1a) -4 A - Pulsed -15 P Power Dissipation for Dual Operation 2 W D Power Dissipation for Single Operation (Note 1a) 1.6 (Note 1b) 1 (Note 1c) 0.9 T ,T Operating and Storage Temperature Range -55 to 150 °C J STG
THERMAL CHARACTERISTICS
R Thermal Resistance, Junction-to-Ambient (Note 1a) 78 °C/W θJA R Thermal Resistance, Junction-to-Case (Note 1) 40 °C/W θJC © 1997 Fairchild Semiconductor Corporation NDS8947.SAM
NDS8947 Dual P-Channel Enhancement Mode Field Effect Transistor General Description Features
These P-Channel enhancement mode power field effect -4A, -30V. R = 0.065Ω @ V = -10V DS(ON) GS transistors are produced using Fairchild's proprietary, high cell R = 0.1Ω @ V = -4.5V. density, DMOS technology. This very high density process is DS(ON) GS especially tailored to minimize on-state resistance and provide High density cell design for extremely low R . DS(ON) superior switching performance. These devices are particularly suited for low voltage applications such as notebook computer High power and current handling capability in a widely used power management and other battery powered circuits where surface mount package. fast switching, low in-line power loss, and resistance to Dual MOSFET in surface mount package. transients are needed. ________________________________________________________________________________ 5 4 6 3 7 2 8 1
Absolute Maximum Ratings
T = 25°C unless otherwise noted A
Symbol Parameter NDS8947 Units
V Drain-Source Voltage -30 V DSS V Gate-Source Voltage -20 V GSS I Drain Current - Continuous D (Note 1a) -4 A - Pulsed -15 P Power Dissipation for Dual Operation 2 W D Power Dissipation for Single Operation (Note 1a) 1.6 (Note 1b) 1 (Note 1c) 0.9 T ,T Operating and Storage Temperature Range -55 to 150 °C J STG
THERMAL CHARACTERISTICS
R Thermal Resistance, Junction-to-Ambient (Note 1a) 78 °C/W θJA R Thermal Resistance, Junction-to-Case (Note 1) 40 °C/W θJC © 1997 Fairchild Semiconductor Corporation NDS8947.SAM