Datasheet OP37 (Analog Devices)

a
Low Noise, Precision, High Speed Operational Amplifier (A VCL > 5) OP37 FEATURES
The output stage has good load driving capability. A guaranteed
Low Noise, 80 nV p-p (0.1 Hz to 10 Hz)
swing of 10 V into 600 W and low output distortion make the
3 nV/
÷
Hz @ 1 kHz
OP37 an excellent choice for professional audio applications.
Low Drift, 0.2 V/ C
PSRR and CMRR exceed 120 dB. These characteristics, coupled
High Speed, 17 V/ s Slew Rate
with long-term drift of 0.2 mV/month, allow the circuit designer
63 MHz Gain Bandwidth
to achieve performance levels previously attained only by
Low Input Offset Voltage, 10 V
discrete designs.
Excellent CMRR, 126 dB (Common-Voltage @ 11 V) High Open-Loop Gain, 1.8 Million
Low-cost, high-volume production of the OP37 is achieved by
Replaces 725, OP-07, SE5534 In Gains > 5
using on-chip zener-zap trimming. This reliable and stable offset
Available in Die Form
trimming scheme has proved its effectiveness over many years of production history.
GENERAL DESCRIPTION
The OP37 brings low-noise instrumentation-type performance to The OP37 provides the same high performance as the OP27, such diverse applications as microphone, tapehead, and RIAA but the design is optimized for circuits with gains greater than phono preamplifiers, high-speed signal conditioning for data five. This design change increases slew rate to 17 V/ms and acquisition systems, and wide-bandwidth instrumentation. gain-bandwidth product to 63 MHz.
PIN CONNECTIONS
The OP37 provides the low offset and drift of the OP07 plus higher speed and lower noise. Offsets down to 25 mV and
8-Lead Hermetic DIP
a maximum drift of 0.6 mV/∞C make the OP37 ideal for preci-
(Z Suffix)
sion instrumentation applications. Exceptionally low noise
Epoxy Mini-DIP
(en= 3.5 nV/ @ 10 Hz), a low 1/f noise corner frequency of
(P Suffix)
2.7 Hz, and the high gain of 1.8 million, allow accurate high-gain amplification of low-level signals.
8-Lead SO (S Suffix)
The low input bias current of 10 nA and offset current of 7 nA are achieved by using a bias-current cancellation circuit. Over the military temperature range this typically holds IB and IOS
1 8 VOS TRIM VOS TRIM OP37
to 20 nA and 15 nA respectively.
–IN 2 7 V+ +IN 3 6 OUT V– 4 5 NC NC = NO CONNECT SIMPLIFIED SCHEMATIC V+ R3 R4 C2 1 8 Q6 Q22 Q46 C1 R1* VOS ADJ. R2* R23 R24 Q21 Q23 Q24 R9 Q20 Q19 Q1A Q1B Q2B Q2A R12 OUTPUT NON-INVERTING C3 C4 INPUT (+) R5 Q3 INVERTING Q26 Q11 Q12 Q45 INPUT (–) Q27 Q28 *R1 AND R2 ARE PERMANENTLY ADJUSTED AT WAFER TEST FOR MINIMUM OFFSET VOLTAGE. V–
REV. B Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that
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Document Outline FEATURES GENERAL DESCRIPTION PIN CONNECTIONS SIMPLIFIED SCHEMATIC ABSOLUTE MAXIMUM RATINGS ORDERING GUIDE SPECIFICATIONS BINDING DIAGRAM Wafer Test Limits Typical Electrical Characteristics Typical Performance Characteristics APPLICATIONS INFORMATION Offset Voltage Adjustment Noise Measurements Optimizing Linearity Instrumentation Amplifier Comments on Noise Audio Applications OUTLINE DIMENSIONS Revision History