Datasheet ADA4075-2 (Analog Devices) - 8
| Fabricante | Analog Devices |
| Descripción | Ultralow Noise Amplifier at Lower Power |
| Páginas / Página | 24 / 8 — ADA4075-2. Data Sheet. VSY = ±15V. VSY = ±5V. I B. –15. –10. VCM (V). Y … |
| Revisión | C |
| Formato / tamaño de archivo | PDF / 1.1 Mb |
| Idioma del documento | Inglés |
ADA4075-2. Data Sheet. VSY = ±15V. VSY = ±5V. I B. –15. –10. VCM (V). Y R. PPL. V+ – VOH. E T. OL – V–. O V. 0.1. 0.001. 0.01. 100. LOAD CURRENT (mA). 2.5. 2.0
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ADA4075-2 Data Sheet 60 60 VSY = ±15V VSY = ±5V 50 50 40 40 ) ) A A 30 (n 30 (n I B I B 20 20 10 10 0 0 –15 –10 –5 0 5 10 15
7
–4 –3 –2 –1 0 1 2 3 4
49 -04 0 2- 642
VCM (V)
64
VCM (V)
07 07 Figure 15. Input Bias Current vs. Input Common-Mode Voltage Figure 18. Input Bias Current vs. Input Common-Mode Voltage
10 10 VSY = ±15V VSY = ±5V ) ) (V (V IL IL A A Y R Y R PPL V+ – VOH PPL V+ – VOH U SU S O O 1 1 E T E T G V G V A OL – V– A OL – V– T T L L O V VO T T U U P P T T U U O O 0.1 0.1
0
0.001 0.01 0.1 1 10 100
13
0.001 0.01 0.1 1 10 100
01 0 2- 2- 64
LOAD CURRENT (mA)
64
LOAD CURRENT (mA)
07 07 Figure 16. Output Voltage to Supply Rail vs. Load Current Figure 19. Output Voltage to Supply Rail vs. Load Current
2.5 2.0 VSY = ±15V VSY = ±5V ) RL = 2kΩ ) V+ – VOH RL = 2kΩ (V IL IL (V A 2.0 V+ – V A OH R 1.5 Y R LY P PPL P 1.5 U SU S O O T 1.0 E T E G G V A 1.0 OL – V– T VOL – V– A L LT O O V T V T 0.5 U U P 0.5 T P T U O OU 0 0
1
–50 –25 0 25 50 75 100 125
01 14
–50 –25 0 25 50 75 100 125
0 2- 2- 64
TEMPERATURE (°C)
64
TEMPERATURE (°C)
07 07 Figure 17. Output Voltage to Supply Rail vs. Temperature Figure 20. Output Voltage to Supply Rail vs. Temperature Rev. C | Page 8 of 24 Document Outline Features Applications Pin Configurations General Description Table of Contents Revision History Specifications Absolute Maximum Ratings Thermal Resistance Power Sequencing ESD Caution Typical Performance Characteristics Applications Information Input Protection Total Harmonic Distortion Phase Reversal DAC Output Filter Balanced Line Driver Balanced Line Receiver Low Noise Parametric Equalizer Schematic Outline Dimensions Ordering Guide
7
–4 –3 –2 –1 0 1 2 3 4
49 -04 0 2- 642
VCM (V)
64
VCM (V)
07 07 Figure 15. Input Bias Current vs. Input Common-Mode Voltage Figure 18. Input Bias Current vs. Input Common-Mode Voltage
10 10 VSY = ±15V VSY = ±5V ) ) (V (V IL IL A A Y R Y R PPL V+ – VOH PPL V+ – VOH U SU S O O 1 1 E T E T G V G V A OL – V– A OL – V– T T L L O V VO T T U U P P T T U U O O 0.1 0.1
0
0.001 0.01 0.1 1 10 100
13
0.001 0.01 0.1 1 10 100
01 0 2- 2- 64
LOAD CURRENT (mA)
64
LOAD CURRENT (mA)
07 07 Figure 16. Output Voltage to Supply Rail vs. Load Current Figure 19. Output Voltage to Supply Rail vs. Load Current
2.5 2.0 VSY = ±15V VSY = ±5V ) RL = 2kΩ ) V+ – VOH RL = 2kΩ (V IL IL (V A 2.0 V+ – V A OH R 1.5 Y R LY P PPL P 1.5 U SU S O O T 1.0 E T E G G V A 1.0 OL – V– T VOL – V– A L LT O O V T V T 0.5 U U P 0.5 T P T U O OU 0 0
1
–50 –25 0 25 50 75 100 125
01 14
–50 –25 0 25 50 75 100 125
0 2- 2- 64
TEMPERATURE (°C)
64
TEMPERATURE (°C)
07 07 Figure 17. Output Voltage to Supply Rail vs. Temperature Figure 20. Output Voltage to Supply Rail vs. Temperature Rev. C | Page 8 of 24 Document Outline Features Applications Pin Configurations General Description Table of Contents Revision History Specifications Absolute Maximum Ratings Thermal Resistance Power Sequencing ESD Caution Typical Performance Characteristics Applications Information Input Protection Total Harmonic Distortion Phase Reversal DAC Output Filter Balanced Line Driver Balanced Line Receiver Low Noise Parametric Equalizer Schematic Outline Dimensions Ordering Guide