Datasheet ADA4075-2 (Analog Devices) - 2

FabricanteAnalog Devices
DescripciónUltralow Noise Amplifier at Lower Power
Páginas / Página24 / 2 — ADA4075-2. Data Sheet. TABLE OF CONTENTS. REVISION HISTORY 11/13—Rev. B …
RevisiónC
Formato / tamaño de archivoPDF / 1.1 Mb
Idioma del documentoInglés

ADA4075-2. Data Sheet. TABLE OF CONTENTS. REVISION HISTORY 11/13—Rev. B to Rev. C. 12/11—Rev. A to Rev. B. 8/09—Rev. 0 to Rev. A

ADA4075-2 Data Sheet TABLE OF CONTENTS REVISION HISTORY 11/13—Rev B to Rev C 12/11—Rev A to Rev B 8/09—Rev 0 to Rev A

Línea de modelo para esta hoja de datos

Versión de texto del documento

link to page 1 link to page 1 link to page 1 link to page 1 link to page 2 link to page 3 link to page 5 link to page 5 link to page 5 link to page 5 link to page 6 link to page 16 link to page 16 link to page 16 link to page 16 link to page 17 link to page 18 link to page 19 link to page 20 link to page 21 link to page 22 link to page 22
ADA4075-2 Data Sheet TABLE OF CONTENTS
Features .. 1 Applications Information .. 16 Applications ... 1 Input Protection ... 16 Pin Configurations ... 1 Total Harmonic Distortion ... 16 General Description ... 1 Phase Reversal .. 16 Revision History ... 2 DAC Output Filter.. 17 Specifications ... 3 Balanced Line Driver ... 18 Absolute Maximum Ratings .. 5 Balanced Line Receiver .. 19 Thermal Resistance .. 5 Low Noise Parametric Equalizer .. 20 Power Sequencing .. 5 Schematic ... 21 ESD Caution .. 5 Outline Dimensions ... 22 Typical Performance Characteristics ... 6 Ordering Guide .. 22
REVISION HISTORY 11/13—Rev. B to Rev. C
Change to Balanced Line Receiver Section ... 19
12/11—Rev. A to Rev. B
Changes to Features Section.. 1
8/09—Rev. 0 to Rev. A
Added 8-Lead LFCSP_WD ... Universal Changes to Table 1 .. 1 Changes to Table 2 .. 3 Changes to Table 3 .. 4 Changes to Table 4 and Table 5 ... 5 Changes to Figure 3, Figure 5, Figure 6, and Figure 8 ... 6 Added Figure 4 and Figure 7; Renumbered Sequential y ... 6 Added Figure 9 and Figure 12 ... 7 Changes to Figure 10, Figure 11, Figure 13, and Figure 14 ... 7 Changes to Figure 16, Figure 17, Figure 19, and Figure 20 ... 8 Changes to Figure 22 and Figure 25 ... 9 Changes to Figure 36 .. 11 Changes to Figure 54 .. 14 Changes to and Moved Figure 57 and Figure 60 to ... 15 Changes to Figure 59 and Figure 62 ... 15 Changes to Input Protection Section and Phase Reversal Section .. 16 Changes to DAC Output Filter Section ... 17 Changes to Figure 67 .. 18 Updated Outline Dimensions ... 22 Changes to Ordering Guide .. 22
10/08—Revision 0: Initial Version
Rev. C | Page 2 of 24 Document Outline Features Applications Pin Configurations General Description Table of Contents Revision History Specifications Absolute Maximum Ratings Thermal Resistance Power Sequencing ESD Caution Typical Performance Characteristics Applications Information Input Protection Total Harmonic Distortion Phase Reversal DAC Output Filter Balanced Line Driver Balanced Line Receiver Low Noise Parametric Equalizer Schematic Outline Dimensions Ordering Guide