Datasheet ADA4350 (Analog Devices) - 6

FabricanteAnalog Devices
DescripciónFET Input Analog Front End with ADC Driver
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ADA4350. Data Sheet. ±5 V ADC DRIVER. Table 4. Parameter. Test Conditions/Comments1. Min. Typ. Max Unit

ADA4350 Data Sheet ±5 V ADC DRIVER Table 4 Parameter Test Conditions/Comments1 Min Typ Max Unit

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ADA4350 Data Sheet ±5 V ADC DRIVER
TA = 25°C, +VS = +5 V, −VS = −5 V, unless otherwise specified. See Figure 1 for the P1 and M1 amplifiers. RL = 1 kΩ when differential, and RL = 500 Ω when single-ended.
Table 4. Parameter Test Conditions/Comments1 Min Typ Max Unit
DYNAMIC PERFORMANCE −3 dB Bandwidth When used differentially, VOUT = 0.1 V p-p 38 MHz When used differentially, VOUT = 2.0 V p-p 16 MHz When P1 is used, VOUT = 50 mV p-p 55 MHz When P1 is used, VOUT = 1.0 V p-p 17 MHz When M1 is used, VOUT = 50 mV p-p 45 MHz When M1 is used, VOUT = 1.0 V p-p 21 MHz Overdrive Recovery Time Positive recovery/negative recovery for P1 200/180 ns Positive recovery/negative recovery for M1 100/100 ns Slew Rate When differentially used, VOUT = 2 V step 57 V/µs When P1 or M1 is single-ended, VOUT = 1 V step 30 V/µs Settling Time 0.1% When used differentially, VOUT = 2 V step 95 ns When P1 is used, VOUT = 1 V step 80 ns When M1 is used, VOUT = 1 V step 80 ns NOISE/DISTORTION PERFORMANCE Harmonic Distortion (HD2/HD3) When used differential y, fC = 100 kHz, VOUT = 4 V p-p −105/−109 dBc When used differentially, fC = 1 MHz, VOUT = 4 V p-p −75/−73 dBc When P1 is used, fC = 100 kHz, VOUT = 2 V p-p −112/−108 dBc When P1 is used, fC = 1 MHz, VOUT = 2 V p-p −75/−73 dBc When M1 is used, fC = 100 kHz, VOUT = 2 V p-p −98/−103 dBc When M1 is used, fC = 1 MHz, VOUT = 2 V p-p −70/−69 dBc Referred to Input (RTI) Voltage Noise For P1, f = 10 Hz 55 nV/√Hz For P1, f = 100 kHz 5 nV/√Hz Referred to Output (RTO) Voltage Noise For P1 and M1, f = 10 Hz , measured at VOUT2 95 nV/√Hz For P1 and M1, f = 100 kHz, measured at VOUT2 16 nV/√Hz Input Current Noise f = 100 kHz, referred to P1 1.1 pA/√Hz DC PERFORMANCE Output Offset Voltage Differential 0.125 0.5 mV Output Offset Voltage Drift Differential 0.7 13 µV/°C Input Offset Voltage Single-ended, P1 only 50 180 µV Single-ended, M1 only 40 180 µV Input Offset Voltage Drift Single-ended, P1 only 0.2 4.75 µV/°C Single-ended, M1 only 0.4 3.6 µV/°C Input Bias Current P1 only at VIN1 pin 60 220 nA P1 only at RF1 pin 60 325 nA M1 at REF pin 60 200 nA Input Offset Current P1 only 60 260 nA Open-Loop Gain P1 only, VOUT = ±2 V 102 112 dB Gain M1 only 1.99 1.9996 2.01 V/V Gain Error −0.5 +0.5 % Gain Error Drift 0.6 1.9 ppm/°C INPUT CHARACTERISTICS Input Resistance VIN1 and REF 200 MΩ Input Capacitance VIN1 and REF 1.4 pF Input Common-Mode Voltage Range −5 +3.8 V Common-Mode Rejection Ratio For P1, VCM = ±3.0 V 82 100 dB Rev. B | Page 6 of 37 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM REVISION HISTORY SPECIFICATIONS ±5 V FULL SYSTEM ±5 V FET INPUT AMPLIFIER ±5 V INTERNAL SWITCHING NETWORK AND DIGITAL PINS ±5 V ADC DRIVER 5 V FULL SYSTEM 5 V FET INPUT AMPLIFIER 5 V INTERNAL SWITCHING NETWORK AND DIGITAL PINS 5 V ADC DRIVER TIMING SPECIFICATIONS Timing Diagrams for Serial Mode ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE MAXIMUM POWER DISSIPATION ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISITICS FULL SYSTEM FET INPUT AMPLIFIER ADC DRIVER TEST CIRCUITS THEORY OF OPERATION KELVIN SWITCHING TECHNIQUES APPLICATIONS INFORMATION CONFIGURING THE ADA4350 SELECTING THE TRANSIMPEDANCE GAIN PATHS MANUALLY OR THROUGH THE PARALLEL INTERFACE SELECTING THE TRANSIMPEDANCE GAIN PATHS THROUGH THE SPI INTERFACE (SERIAL MODE) SPICE MODEL TRANSIMPEDANCE AMPLIFIER DESIGN THEORY TRANSIMPEDANCE GAIN AMPLIFIER PERFORMANCE THE EFFECT OF LOW FEEDBACK RESISTOR RFx USING THE T NETWORK TO IMPLEMENT LARGE FEEDBACK RESISTOR VALUES OUTLINE DIMENSIONS ORDERING GUIDE