Datasheet ADA4350 (Analog Devices) - 10

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ADA4350 Data Sheet 5 V INTERNAL SWITCHING NETWORK AND DIGITAL PINS
TA = 25°C, +VS = 5 V, −VS = 0 V, unless otherwise specified. See Figure 1 for sampling and feedback switches position.
Table 7. Parameter Symbol Test Conditions/Comments Min Typ Max Unit
FEEDBACK/SAMPLE ANALOG SWITCH Analog Signal Range 0 5 V Switch On Resistance Feedback RON, FB S0 to S2, VCM = 2.5 V 308 390 Ω TA = 85°C 382 Ω S3 to S5, VCM = 2.5 V 308 390 Ω TA = 85°C 384 Ω Sampling RON, S S6 to S8, VCM = 2.5 V 610 770 Ω TA = 85°C 762 Ω S9 to S11, VCM = 2.5 V 612 770 Ω TA = 85°C 764 Ω On-Resistance Match Between Channels Feedback Resistance ΔRON, FB VCM = 2.5 V 3 21 Ω Sampling Resistance ΔRON, S VCM = 2.5 V 3 23 Ω SWITCH LEAKAGE CURRENTS Sampling and Feedback Switch Off Leakage IS (OFF) ±0.4 ±1.2 pA TA = 85°C ±30 ±80 pA DYNAMIC CHARACTERISTICS Power-On Time tON DVDD = 3.3 V 105 ns Power-Off Time t OFF DVDD = 3.3 V 65 ns Off Isolation RL = 50 Ω, f = 1 MHz Feedback Switches −93 dB Sampling Switches −116 dB Channel to Channel Crosstalk RL = 50 Ω, f = 1 MHz −83 dB Worst Case Switch Feedback Capacitance (Switch Off) CFB (OFF) 0.1 pF THRESHOLD VOLTAGES FOR DIGITAL INPUT PINS EN, MODE, DGND, LATCH/P0, SCLK/P1, SDO/P2, SDI/P3, CS/P41 Input High Voltage VIH DVDD = 5 V 2.0 V DVDD = 3.3 V 1.5 V Input Low Voltage VIL DVDD = 5 V 1.4 V DVDD = 3.3 V 1.0 V DIGITAL SUPPLIES DVDD, DGND Digital Supply Range 3.3 5.5 V Quiescent Current Enabled 50 µA Disabled 0.6 µA +VS to DGND Head Room ≥3.3 V 1 When referring to a single function of a multifunction pin, only the portion of the pin name that is relevant to the specification is listed. For ful pin names of multifunction pins, refer to the Pin Configuration and Function Descriptions section. Rev. B | Page 10 of 37 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM REVISION HISTORY SPECIFICATIONS ±5 V FULL SYSTEM ±5 V FET INPUT AMPLIFIER ±5 V INTERNAL SWITCHING NETWORK AND DIGITAL PINS ±5 V ADC DRIVER 5 V FULL SYSTEM 5 V FET INPUT AMPLIFIER 5 V INTERNAL SWITCHING NETWORK AND DIGITAL PINS 5 V ADC DRIVER TIMING SPECIFICATIONS Timing Diagrams for Serial Mode ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE MAXIMUM POWER DISSIPATION ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISITICS FULL SYSTEM FET INPUT AMPLIFIER ADC DRIVER TEST CIRCUITS THEORY OF OPERATION KELVIN SWITCHING TECHNIQUES APPLICATIONS INFORMATION CONFIGURING THE ADA4350 SELECTING THE TRANSIMPEDANCE GAIN PATHS MANUALLY OR THROUGH THE PARALLEL INTERFACE SELECTING THE TRANSIMPEDANCE GAIN PATHS THROUGH THE SPI INTERFACE (SERIAL MODE) SPICE MODEL TRANSIMPEDANCE AMPLIFIER DESIGN THEORY TRANSIMPEDANCE GAIN AMPLIFIER PERFORMANCE THE EFFECT OF LOW FEEDBACK RESISTOR RFx USING THE T NETWORK TO IMPLEMENT LARGE FEEDBACK RESISTOR VALUES OUTLINE DIMENSIONS ORDERING GUIDE