Datasheet LYTSwitch-6 (Power Integrations) - 7

LYTSwitch-6 Output Voltage Protection SR Static Pull-Down
In the event the sensed voltage on the FEEDBACK pin is 2% higher To ensure that the SR gate is held low when the secondary is not in than the regulation threshold, a bleed current of ~2.5 mA (3 mA max) control, the SYNCHRONOUS RECTIFIER DRIVE pin has a nominal y is applied on the OUTPUT VOLTAGE pin (weak bleed). This bleed “ON” device to pull the pin low and discharge any voltage current increases to ~200 mA in the event the FEEDBACK pin voltage accumulation on the SR gate due to capacitive coupling from the is raised to beyond ~10% (strong bleed) of the internal FEEDBACK FORWARD pin. pin reference voltage. The current sink on the OUTPUT VOLTAGE pin
Open SR Protection
is intended to discharge the output voltage for momentary overshoot The secondary control er has a protection mode to ensure the events. The secondary does not relinquish control to the primary SYNCHRONOUS RECTIFIER DRIVE pin is connected to an external during this mode of operation. MOSFET to protect against an open SYNCHRONOUS RECTIFIER If the voltage on the FEEDBACK pin is sensed to be 20% higher than DRIVE pin system fault. At start-up the control er will sink a current the regulation threshold, a command is sent to the primary to begin from the SYNCHRONOUS RECTIFIER DRIVE pin; an internal threshold an auto-restart sequence. This integrated V OVP can be used will correlate to a capacitance of 100 pF. If the capacitance on the OUT independently from the primary sensed OVP or in conjunction. SYNCHRONOUS RECTIFIER DRIVE pin is below 100 pF (the resulting voltage is below the reference voltage), the device will assume the
FEEDBACK Pin Short Detection
SYNCHRONOUS RECTIFIER DRIVE pin is “open” and there is no FET If the sensed FEEDBACK pin voltage is below V at start-up, the FB(OFF) to drive. If the pin capacitance detected to be above 100 pF (the secondary control er will complete the handshake to take control of resulting voltage is above the reference voltage), the control er will the primary complete t and will stop requesting cycles to initiate SS(RAMP) assume an SR FET is populated. auto-restart (no cycle requests made to primary for longer than t AR(SK) second triggers auto-restart). In the event the SYNCHRONOUS RECTIFIER DRIVE pin is detected to be open, the secondary control er will stop requesting pulses to the During normal operation, the secondary will stop requesting pulses primary to initiate auto-restart. from the primary to initiate an auto-restart cycle when the FEEDBACK pin voltage fal s below V threshold. The deglitch filter on the If the SYNCHRONOUS RECTIFIER DRIVE pin is tied to ground at FB(OFF) protection mode is less than 10 ms. By this mechanism, the secondary start-up, the SR drive function is disabled and the open SYNCHRONOUS will relinquish control after detecting the FEEDBACK pin is shorted to RECTIFIER DRIVE pin protection mode is also disabled. ground.
Intelligent Quasi-Resonant Mode Switching Auto-Restart Thresholds
In order to improve conversion efficiency and reduce switching The OUTPUT VOLTAGE pin includes a comparator to detect when the losses, the LYTSwitch-6 features a means to force switching when the output voltage fal s below V of V , for a duration exceeding VO(AR) VO voltage across the primary switch is near its minimum voltage when t . The secondary control er will relinquish control when this VOUT(AR) the converter operates in discontinuous conduction mode (DCM). fault condition is sensed. This threshold is meant to limit the range of This mode of operation automatical y engages in DCM and disabled constant current (CC) operation. once the converter moves to continuous-conduction mode (CCM).
SECONDARY BYPASS Overvoltage Protection
Rather than detecting the magnetizing ring val ey on the primary- The LYTSwitch-6 secondary control er features SECONDARY BYPASS side, the peak voltage of the FORWARD pin voltage as it rises above pin OV feature similar to PRIMARY BYPASS pin OV feature. When the the output voltage level is used to gate secondary request to initiate secondary is in control: in the event the SECONDARY BYPASS pin the switch “ON” cycle in the primary control er. current exceeds I (~7 mA) the secondary will send a command BPS(SD) to the primary to initiate an auto-restart off-time (t ) event. The secondary control er detects when the control er enters in AR(OFF) discontinuous-mode and opens secondary cycle request windows
Output Constant Current
corresponding to minimum switching voltage across the primary The LYTSwitch-6 regulates the output current through an external power switch. current sense resistor between the ISENSE and SECONDARY GROUND pins where the voltage generated across the resistor is Quasi-Resonant (QR) mode is enabled for 20 msec after DCM is compared to internal of I (~35 mV). If constant current detected or ring amplitude (pk-pk) >2 V. Afterward QR switching is SV(TH) regulation is not required, the ISENSE pin must be tied to disabled, at which point switching may occur at any time a secondary SECONDARY GROUND pin. request is initiated. The secondary control er includes blanking of ~1 ms to prevent false detection of primary “ON” cycle when the FORWARD pin rings below ground.
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Rev. K 06/20 www.power.com Document Outline Product Highlights Description Output Power Table LYTSwitch-6 Functional Description Primary Controller Secondary Controller Absolute Maximum Ratings Thermal Resistance Key Electrical Characteristics Typical Performance Curves InSOP-24D Package Drawing MSL Table ESD and Latch-Up Table Part Ordering Information