Datasheet ADP5030 (Analog Devices) - 10
| Fabricante | Analog Devices |
| Descripción | Dual, 200 mA, High Performance RF LDO with Load Switch |
| Páginas / Página | 20 / 10 — ADP5030. VIN1, 1V/DIV. OUT1, 50mV/DIV. VOUT1, 10mV/DIV. OUT2, 10mV/DIV. … |
| Revisión | B |
| Formato / tamaño de archivo | PDF / 813 Kb |
| Idioma del documento | Inglés |
ADP5030. VIN1, 1V/DIV. OUT1, 50mV/DIV. VOUT1, 10mV/DIV. OUT2, 10mV/DIV. ILOAD1, 100mA/DIV. VOUT2, 10mV/DIV. CH1 50.0mV. CH2 10.0mV
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ADP5030 VIN1, 1V/DIV V 1 OUT1, 50mV/DIV V VOUT1, 10mV/DIV 2 OUT2, 10mV/DIV 2 ILOAD1, 100mA/DIV 1 VOUT2, 10mV/DIV 3 3
21 24 0 0 3- 3- 89 89 07 07
CH1 50.0mV B CH2 10.0mV B B B W M 20.0µs A CH3 112mA W CH1 1.00V CH2 10.0mV W M 4.00µs A CH4 –80.0mV W CH3 100mA Ω BW T 10.20% CH3 10.0mV BW T 9.000%
Figure 21. Load Transient Response, ILOAD1 = 1 mA to 200 mA, ILOAD2 = 1 mA, Figure 24. Line Transient Response, VIN1 = 4 V to 5 V, ILOAD1 = 200 mA, CH1 = VOUT1, CH2 = VOUT2, CH3 = ILOAD1, COUT = 1 μF ILOAD2 = 200 mA, CH1 = VIN1, CH2 = VOUT1, CH3 = VOUT2
V V OUT3, 500mV/DIV OUT1, 10mV/DIV 1 2 VOUT2, 50mV/DIV 1 I EN2, 1V/DIV LOAD2, 100mA/DIV 3
2
2
5 02 -02 3- 3 89 89 07 07
CH1 10.0mV B CH2 50.0mV B B B W M 20.0µs A CH3 128mA W CH1 500mV CH2 1.00V W M 20.0µs A CH2 820mV W CH3 100mA Ω B T 10.20% W T 10.40%
Figure 22. Load Transient Response, ILOAD1 = 1 mA, ILOAD2 = 1 mA to 200 mA, Figure 25. Load Switch Typical Switching Time, ILOAD3 = 500 mA, CH1 = VOUT1, CH2 = VOUT2, CH3 = ILOAD2 CH1 = VOUT3, CH2 = EN2
VIN1, 1V/DIV VOUT3, 500mV/DIV VOUT1, 10mV/DIV 2 1 1 EN2, 1V/DIV VOUT2, 10mV/DIV 3
3
2
6 02 -02 3- 3 89 89 07 07
CH1 1.00V B CH2 10.0mV B B B W M 4.00µs A CH4 –80.0mV W CH1 500mV CH2 1.00V W M 20.0µs A CH2 920mV W CH3 10.0mV B T 9.800% W T 10.40%
Figure 23. Line Transient Response, VIN1 = 4 V to 5 V, ILOAD1 = 1 mA, ILOAD2 = 1 mA, Figure 26. Load Switch Typical Switching Time, ILOAD3 = 100 mA, CH1 = VIN1, CH2 = VOUT1, CH3 = VOUT2 CH1 = VOUT3, CH2 = EN2 Rev. B | Page 10 of 10 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS INPUT AND OUTPUT CAPACITOR, RECOMMENDED SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL DATA THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION APPLICATIONS INFORMATION LDO2 AND LOAD SWITCH ACTIVATION LOGIC SEQUENCING CAPACITOR SELECTION Output Capacitor Input Bypass Capacitor Input and Output Capacitor Properties UNDERVOLTAGE LOCKOUT ENABLE FEATURE CURRENT-LIMIT AND THERMAL OVERLOAD PROTECTION THERMAL CONSIDERATIONS PCB LAYOUT CONSIDERATIONS OUTLINE DIMENSIONS ORDERING GUIDE
21 24 0 0 3- 3- 89 89 07 07
CH1 50.0mV B CH2 10.0mV B B B W M 20.0µs A CH3 112mA W CH1 1.00V CH2 10.0mV W M 4.00µs A CH4 –80.0mV W CH3 100mA Ω BW T 10.20% CH3 10.0mV BW T 9.000%
Figure 21. Load Transient Response, ILOAD1 = 1 mA to 200 mA, ILOAD2 = 1 mA, Figure 24. Line Transient Response, VIN1 = 4 V to 5 V, ILOAD1 = 200 mA, CH1 = VOUT1, CH2 = VOUT2, CH3 = ILOAD1, COUT = 1 μF ILOAD2 = 200 mA, CH1 = VIN1, CH2 = VOUT1, CH3 = VOUT2
V V OUT3, 500mV/DIV OUT1, 10mV/DIV 1 2 VOUT2, 50mV/DIV 1 I EN2, 1V/DIV LOAD2, 100mA/DIV 3
2
2
5 02 -02 3- 3 89 89 07 07
CH1 10.0mV B CH2 50.0mV B B B W M 20.0µs A CH3 128mA W CH1 500mV CH2 1.00V W M 20.0µs A CH2 820mV W CH3 100mA Ω B T 10.20% W T 10.40%
Figure 22. Load Transient Response, ILOAD1 = 1 mA, ILOAD2 = 1 mA to 200 mA, Figure 25. Load Switch Typical Switching Time, ILOAD3 = 500 mA, CH1 = VOUT1, CH2 = VOUT2, CH3 = ILOAD2 CH1 = VOUT3, CH2 = EN2
VIN1, 1V/DIV VOUT3, 500mV/DIV VOUT1, 10mV/DIV 2 1 1 EN2, 1V/DIV VOUT2, 10mV/DIV 3
3
2
6 02 -02 3- 3 89 89 07 07
CH1 1.00V B CH2 10.0mV B B B W M 4.00µs A CH4 –80.0mV W CH1 500mV CH2 1.00V W M 20.0µs A CH2 920mV W CH3 10.0mV B T 9.800% W T 10.40%
Figure 23. Line Transient Response, VIN1 = 4 V to 5 V, ILOAD1 = 1 mA, ILOAD2 = 1 mA, Figure 26. Load Switch Typical Switching Time, ILOAD3 = 100 mA, CH1 = VIN1, CH2 = VOUT1, CH3 = VOUT2 CH1 = VOUT3, CH2 = EN2 Rev. B | Page 10 of 10 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS INPUT AND OUTPUT CAPACITOR, RECOMMENDED SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL DATA THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION APPLICATIONS INFORMATION LDO2 AND LOAD SWITCH ACTIVATION LOGIC SEQUENCING CAPACITOR SELECTION Output Capacitor Input Bypass Capacitor Input and Output Capacitor Properties UNDERVOLTAGE LOCKOUT ENABLE FEATURE CURRENT-LIMIT AND THERMAL OVERLOAD PROTECTION THERMAL CONSIDERATIONS PCB LAYOUT CONSIDERATIONS OUTLINE DIMENSIONS ORDERING GUIDE