Datasheet AD8561 (Analog Devices) - 3

AD8561 ELECTRICAL SPECIFICATIONS (@ V+ = +5.0 V, V– = VGND = 0 V, V– = –5 V, TA = +25
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C unless otherwise noted) Parameter Symbol Conditions Min Typ Max Units
INPUT CHARACTERISTICS Offset Voltage VOS 1 7 mV –40°C ≤ TA ≤ +85°C 8 mV Offset Voltage Drift ΔVOS/ΔT 4 μV/°C Input Bias Current IB VCM = 0 V –6 –3 μA IB –40°C ≤ TA ≤ +85°C –7 –2.5 μA Input Offset Current IOS VCM = 0 V ±4 μA Input Common-Mode Voltage Range VCM –5.0 +3.0 V Common-Mode Rejection Ratio CMRR –5.0 V ≤ VCM ≤ +3.0 V 65 85 dB Large Signal Voltage Gain AVO RL = 10 kΩ 3000 V/V Input Capacitance CIN 3.0 pF LATCH ENABLE INPUT Logic “1” Voltage Threshold VIH 2.0 1.65 V Logic “0” Voltage Threshold VIL 1.60 0.8 V Logic “1” Current IIH VLH = 3.0 V –1 –0.5 20 μA Logic “0” Current IIL VLL = 0.3 V –4 –2 20 μA Latch Enable Pulsewidth tPW(E) 6 ns Setup Time tS 1.0 ns Hold Time tH 1.2 ns DIGITAL OUTPUTS Logic “1” Voltage VOH IOH = –3.2 mA 2.6 3.5 V Logic “0” Voltage VOL IOL = 3.2 mA 0.2 0.3 V DYNAMIC PERFORMANCE Propagation Delay tP 200 mV Step with 100 mV Overdrive 6.5 9.8 ns –40°C ≤ TA ≤ +85°C 8 13 ns Propagation Delay tP 100 mV Step with 5 mV Overdrive 7 ns Differential Propagation Delay (Rising Propagation Delay vs. Falling Propagation Delay) ΔtP 100 mV Step with 100 mV Overdrive1 0.5 2 ns Rise Time 20% to 80% 3.8 ns Fall Time 80% to 20% 1.5 ns Dispersion 1 ns POWER SUPPLY Power Supply Rejection Ratio PSRR ±4.5 V ≤ VCC and VEE ≤ ±5.5 V 55 70 dB Supply Current VO = 0 V, RL = ∞ Positive Supply Current I+ 4.7 6.5 mA –40°C ≤ TA ≤ +85°C 7.5 mA Ground Supply Current IGND VO = 0 V, RL = ∞ 2.2 3.3 mA –40°C ≤ TA ≤ +85°C 3.8 mA Negative Supply Current I– 2.4 4.5 mA –40°C ≤ TA ≤ +85°C 5.5 mA NOTES 1 Guaranteed by design. Specifications subject to change without notice. Rev. D –3– Document Outline Features Applications General Description Pin Configurations Specifications Electrical Specifications Absolute Maximum Ratings Typical Performance Characteristics Applications Optimizing High Speed Performance Replacing the LT1016 Increasing Output Swing Output Loading Considerations Setup and Hold Times for Latching the Output Input Stage and Bias Currents Using Hysteresis SPICE Model Outline Dimensions Ordering Guide Revision History