Datasheet AD8561 (Analog Devices) - 10

AD8561 GSY1 99 52 POLY(1) (99,50) 4E-3 -2.6E-4 GSY2 52 50 POLY(1) (99,50) 3.7E-3 -.6E-3 RSY 52 51 10 * * Gain Stage Av=250 fp=100MHz * G2 98 20 (12,98) 0.25 R1 20 98 1000 C1 20 98 10E-13 D2 20 21 DX D3 22 20 DX V1 99 21 DC 0.8 V2 22 50 DC 0.8 * * Q Output * Q3 99 41 46 NOX Q4 47 42 50 NOX RB1 43 41 200 RB2 40 42 5E3 CB1 99 41 10E-12 CB2 42 50 5E-12 RO1 46 45 2E3 RO2 47 45 500 EO1 98 43 POLY(1) (20,98) 0 1 EO2 40 98 POLY(1) (20,98) 0 1 * * Q NOT Output * Q5 99 61 66 NOX Q6 67 62 50 NOX RB3 63 61 200 RB4 60 62 5E3 CB3 99 61 10E-12 CB4 62 50 5E-12 RO3 66 65 2E3 RO4 67 65 500 EO3 63 98 POLY(1) (20,98) 0 1 EO4 98 60 POLY(1) (20,98) 0 1 * * MODELS * .MODEL PIX PNP(BF=100,IS=1E-16) .MODEL NOX NPN(BF=100,VAF=130,IS=1E-14) .MODEL DX D(IS=1E-16) .MODEL SLATCH1 VSWITCH(ROFF=1E6,RON=500,VOFF=2.1,VON=1.4) .ENDS AD8561
–10– Rev. D Document Outline Features Applications General Description Pin Configurations Specifications Electrical Specifications Absolute Maximum Ratings Typical Performance Characteristics Applications Optimizing High Speed Performance Replacing the LT1016 Increasing Output Swing Output Loading Considerations Setup and Hold Times for Latching the Output Input Stage and Bias Currents Using Hysteresis SPICE Model Outline Dimensions Ordering Guide Revision History