Datasheet ADRV9026 (Analog Devices) - 3

Data Sheet ADRV9026 FUNCTIONAL BLOCK DIAGRAM RX3, RX4, TX3, TX4, ORX3/ORX4 RX1, RX2, TX1, TX2, ORX1/ORX2 RX3+ RX3– Rx1 RX4+ RX4– Rx2 RX1+ ADC DECIMATION, RX1– PROGRAMMABLE FIR, SERDOUTA± RX2+ LO1 AGC, SERDOUTB± 0° DC-OFFSET, RX2– UX 90° M LO SERDOUTC± 2 QEC, TUNING, SERDOUTD± ADC RSSI, OVERLOAD TX3+ TX3– Tx1 TX4+ TX4– Tx2 SYNCIN1± TX1+ DAC SYNCIN2± pFIR, JESD204B/ TX1– SYNCIN3± LO LO LEAKAGE, JESD204C 1 TX2+ 0° UX QEC, SERIAL TX2– 90° M TUNING, INTERFACE LO2 INTERPOLATION SERDINA± DAC SERDINB± SERDINC± SERDIND± ORX3+ ORX3– ORX4+ ORX1/ORX2 ORX4– ADC DECIMATION, ORX2+ pFIR, SYNCOUT1± ORX2– 0° UX DC-OFFSET, 90° QEC, SYNCOUT2± ORX1+ M LO3 ORX1– TUNING, OVERLOAD ADC 8 VDDA_1P81 GPIO_ANA_x GPIO VDDA_1P32 AUXILIARY ADC 4 AUXADC_x VDDA_1P03 POWER MANAGEMENT AUXILIARY DAC 19 GPIO_x VIF VDIG_1P0 MICROPROCESSOR CLOCK GENERATION DEVCLK± AND SYNCHRONIZATION SYSREF± RF SYNTH LO3 RF SYNTH SPI_CLK SPI_EN RF SYNTH SPI PORT SPI_DO LO1 SPI_DIO GPINT1 GPINT2 LO 4 2 RXx_EN CONTROL 4 INTERFACE TXx_EN 4 ORX_CTRL_x RESET TEST_EN 1VDDA_1P8 REPRESENTS VCONV1_1P8, VCONV2_1P8, VANA1_1P8, VANA2_1P8, VANA3_1P8, VANA4_1P8, AND VJVCO_1P8. 2VDDA_1P3 REPRESENTS VANA1_1P3, VANA2_1P3, VCONV1_1P3, VCONV2_1P3, VRFVCO1_1P3, VRFVCO2_1P3, VAUXVCO_1P3, VCLKVCO_1P3,
001
VRFSYN1_1P3, VRFSYN2_1P3, VCLKSYN_1P3, VAUXSYN_1P3, VRXLO_1P3, AND VTXLO_1P3. 3VDDA_1P0 REPRESENTS VJSYN_1P0, VDES_1P0, VTT_DES, AND VSER_1P0.
22382- Figure 1. Rev. A | Page 3 of 118 Document Outline Features Applications General Description Revision History Functional Block Diagram Specifications Transmitters and Receivers Synthesizers, Auxiliary Converters, and Clock References Digital Specifications Power Supply Specifications Current Consumption TDD Operation—Four Receiver Channels Enabled TDD Operation—Four Transmitter and One Observation Receiver Channels Enabled FDD Operation—LO1 and LO2, Four Receiver, Four Transmitter, and One Observation Receiver Channels Enabled Digital Interface and Timing Specifications Absolute Maximum Ratings Junction Temperature Reflow Profile Thermal Resistance ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics 800 MHz Band 1800 MHz Band 2600 MHz Band 3800 MHz Band 4800 MHz Band 5700 MHz Band Theory of Operation General Transmitter Receiver Observation Receiver Clock Input Synthesizers RF Synthesizers Auxiliary Synthesizer Clock Synthesizer SPI Interface GPIO_x Pins Auxiliary Converters GPIO_ANA_x/AUXDAC_x AUXADC_x JTAG Boundary Scan Applications Information Power Supply Sequence Data Interface Outline Dimensions Ordering Guide