Datasheet ZSSC3240 (Renesas) - 10

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ZSSC3240 Symbol Parameter Conditions Minimum Typical Maximum Units
ZSSC3240 accuracy Accuracy error with an ideally linear ErrA,IC – – 0.01 % FSO error sensor (in temperature and measurand) Correctable (in PGA), Programmable in 1mV steps; accuracy: Vioffsc absolute, differential input ±5% referenced to nominal setup -15 0 15 mV offset Correctable (in ADC), Percentage of sensor signal offset ΔADC,c relative, differential input versus maximum sensor signal 0 – 98 % offset
Input
Absolute sensor input Voltages at INP and INN pin; resulting VINP, VINN minimum/maximum differential voltages: 0.5 – 1.20 V -700mV < VINdiff < 700mV External temperature At T V EXT pin TEXT 0.5 – 1.25 V diode or RTD input range External sensor (bridge) VDDB = 1.75V 0.5 – 60 kΩ RSENSOR resistance For 4mA to 20mA current loop output 1.6 – 60 kΩ Differential input signal Referenced to sensor supply (VDDA |V int); DIFFin| 2.6 50 700 mV range leading to full scale analog excitation
Diagnostics
Sensor connection loss; INP vs. INN Ropen 70 – – kΩ i.e., open threshold Sensor connection short INP vs. INN; T R EXT vs. VDDB short – – 100 Ω threshold Valid sensor input signal Beyond Vs,valid, sensor connection checks Vs,valid (such as in-range, etc.) signalize 0.44 – 1.31 V Diagnostic FAULTs
Power-Up
tSTA1 VDD ramp up to interface communication – – 2 ms Start-up Time tSTA2 VDD ramp up to analog operation – – 2.5 ms Sleep to Active State interface tWUP1 – 2 10 µs Wake-up Time communication tWUP2 Sleep to Active State analog operation – – 2 ms
Oscillator
Internal oscillator fCLK 5.9 6.0 6.1 MHz frequency
Temperature Sensor(s)
Internal temperature Setup: ADT r Tsens,int = 13-bit Temp 12 35 – Counts/K sensor resolution Internal low TC [f] Programmable with internal_rt and top/bottom resistance for extra_rt; Rt, Rt' 1.34 – 40 kΩ external temperature applied if temp_source є {010; 110} (see section 6.2.4)
Interface and Memory
fC,SPI SPI clock frequency 0.05 1 12 MHz fC,I2C I2C clock frequency - – 3.4 MHz CDOWI OWI data rate 0.33 – 10 kBit/s tPROG NVM program time Programming time per 16-bit word – 3 7 ms nNVM NVM endurance Number of reprogramming cycles 1000 10000 – Numeric tRET,NVM Data retention 10 – – Years [a] Referenced to nominal value. Relative errors are typically < 1% for sensor bias current setups > 20µA. [b] PSRR = 20·log10(VDD/VDDB): will be improved when applying external filter elements at VDD and/or also using an external JFET regulator. [c] This parameter must be taken into account if automatic common mode regulation in the PGA is switched off (pga_en_shift; see section 6.2.1) and a non-symmetric sensor supply and input to the PGA ADC path have been configured. [d] There are several setups and parameters that allow optimizing and maximizing the output update rate; e.g., ADC and DAC resolutions, configurations for the measurement sequence, usage of the internal or an external temperature sensor. [e] Vioffsc and ΔADC,c can be arbitrarily set up and combined. They work independently on each other. [f] Typical residual temperature variation of voltage across Rt, Rt': 10ppm/K; maximum deviation: 150ppm/K at 40kΩ and >100°C, all other setups and conditions < 60ppm/K. [g] ENOB = log2( 2rADC / 3σNoise ) with, for example rADC[Bit] = 24. Apr.15.20 Page 10 Document Outline 1. Pin Assignments 2. Pin Descriptions 3. Absolute Maximum Ratings 4. Recommended Operating Conditions 5. Electrical Characteristics 6. Device Description 6.1 Signal Flow 6.2 Analog (Sensor) Front-End 6.2.1. Programmable-Gain Amplifier (PGA) 6.2.2. Analog-to-Digital Converter (ADC) 6.2.3. Internal Temperature Sensor 6.2.4. Supported Supplies for Sensor Elements and Additional, External Temperature Sensing 6.3 On-Chip Diagnostics 6.4 Digital Interfaces 6.4.1. SPI 6.4.2. I2C 6.4.3. One-Wire-Interface, OWI 6.5 Measurement and Output Options 6.5.1. Single Measurements, Digital Raw Results, and SSC Results 6.5.2. Cyclic, Continuous, Repeated Measurements – Measurement Scheduler 6.5.3. Analog Outputs: Digital-to-Analog Converter (DAC) 6.5.4. Output Interrupt Signaling 6.6 System Setup and Control 6.6.1. Digital Commands 6.6.2. Nonvolatile Memory (NVM) 6.6.3. Digital Sensor-Signal-Conditioning Mathematics 6.7 External, Extra LDO (LDOctrl) for Applications for > 5.5V 7. Calibration 8. Package Outline Drawings 9. Marking Diagram 10. Ordering Information 11. Glossary 12. Revision History