Datasheet ADP1074 (Analog Devices) - 8

FabricanteAnalog Devices
DescripciónIsolated, Synchronous Forward Controller with Active Clamp and iCoupler
Páginas / Página32 / 8 — ADP1074. Data Sheet. REGULATORY INFORMATION. Table 4. Regulatory …
RevisiónC
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Idioma del documentoInglés

ADP1074. Data Sheet. REGULATORY INFORMATION. Table 4. Regulatory Information for Wide Body SOIC Package UL (Pending)

ADP1074 Data Sheet REGULATORY INFORMATION Table 4 Regulatory Information for Wide Body SOIC Package UL (Pending)

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ADP1074 Data Sheet REGULATORY INFORMATION
See Table 4, Table 5, and the Insulation Lifetime section for details regarding recommended maximum working voltages for specific cross isolation waveforms and insulation levels.
Table 4. Regulatory Information for Wide Body SOIC Package UL (Pending) CSA (Pending) VDE (Pending) CQC (Pending)
Recognized Under UL 1577 Approved under CSA Component Certified according to Certified by Component Recognition Acceptance Notice 5A DIN V VDE V 0884-10 CQC11-471543-2012, Program1 (VDE V 0884-10):2006-122 GB4943.1-2011: Single Protection, 5000 V rms CSA 60950-1-07+A1+A2 and IEC 60950-1, Reinforced insulation, Basic insulation at 780 V rms Isolation Voltage second edition, +A1+A2 and IEC62368: maximum working (1103 V peak) insulation voltage (VIORM) = 849 V peak, highest allowable overvoltage (VIOTM) = 8000 V peak Basic insulation at 780 V rms Reinforced insulation at 389 V rms (1103 V peak) (552 V peak), tropical climate, altitude ≤5000 meters Reinforced insulation at 390 V rms (552 V peak) IEC 60601-1 Edition 3.1: Basic insulation (1 means of patient protection (1 MOPP)), 490 V rms (686 V peak) Reinforced insulation (2 MOPP), 238 V rms (325 V peak) CSA 61010-1-12 and IEC 61010-1 third edition: Basic insulation at 300 V rms mains, 780 V secondary (1103 V peak) File (pending) File (pending) File (pending) File (pending) 1 In accordance with UL 1577, each product is proof tested by applying an insulation test voltage ≥6000 V rms for 1 sec. 2 In accordance with DIN V VDE V 0884-10, each product is proof tested by applying an insulation test voltage ≥1592 V peak for 1 sec (partial discharge detection limit = 5 pC). Note that the asterisk (*) marking branded on the component designates DIN V VDE V 0884-10 approval.
Table 5. Regulatory Information for LGA Package UL (Pending) CSA (Pending) VDE (Pending) CQC (Pending)
Recognized Under UL 1577 Approved under CSA Component Certified according to Certified by Component Recognition Acceptance Notice 5A DIN V VDE V 0884-10 CQC11-471543-2012, Program1 (VDE V 0884-10):2006-122 GB4943.1-2011: Single Protection, 3000V rms CSA 60950-1-07+A1+A2 and IEC 60950-1, Reinforced insulation, Basic insulation at 400 V rms Isolation Voltage second edition, +A1+A2 and IEC62368: VIORM = 565 V peak, (565 V peak) VIOTM = 4242 V peak impulse voltage = 4242 V peak Basic insulation at 400 V rms (565 V peak) Reinforced insulation at 200 V rms (283 V peak), tropical climate, Reinforced insulation at 200 V rms altitude ≤5000 meters (283 V peak) IEC 60601-1 Edition 3.1: Basic insulation (1 means of patient protection (1 MOPP)), 250 V rms (354 V peak) CSA 61010-1-12 and IEC 61010-1 third edition: Basic insulation at 300 V rms mains, 400 V secondary (565 V peak) File (pending) File (pending) File (pending) File (pending) 1 In accordance with UL 1577, each product is proof tested by applying an insulation test voltage ≥3000 V rms for 1 sec. 2 In accordance with DIN V VDE V 0884-10, each product is proof tested by applying an insulation test voltage ≥1059 V peak for 1 sec (partial discharge detection limit = 5 pC). Note that the asterisk (*) marking branded on the component designates DIN V VDE V 0884-10 approval. Rev. C | Page 8 of 32 Document Outline FEATURES APPLICATIONS SIMPLIFIED BLOCK DIAGRAM TABLE OF CONTENTS REVISION HISTORY GENERAL DESCRIPTION SPECIFICATIONS INSULATION AND SAFETY RELATED SPECIFICATIONS REGULATORY INFORMATION DIN V VDE V 0884-10 (VDE V 0884-10) INSULATION CHARACTERISTICS DIN V VDE V 0884-10 (VDE V 0884-10) INSULATION CHARACTERISTICS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION DETAILED BLOCK DIAGRAM PRIMARY SIDE SUPPLY, INPUT VOLTAGE, AND LDO SECONDARY SIDE SUPPLY AND LDO PRECISION ENABLE SOFT START PROCEDURE OUTPUT VOLTAGE SENSING AND FEEDBACK LOOP COMPENSATION AND STEADY STATE OPERATION SLOPE COMPENSATION INPUT/OUTPUT CURRENT-LIMIT PROTECTION TEMPERATURE SENSING FREQUENCY SETTING (RT PIN) MAXIMUM DUTY CYCLE FREQUENCY SYNCHRONIZATION SYNCHRONOUS RECTIFIER (SR) DRIVERS OUTPUT OVERVOLTAGE PROTECTION (OVP) ACTIVE CLAMP (PGATE) LEADING EDGE BLANKING GATE DELAY AND SR DEAD TIME LIGHT LOAD MODE (LLM) AND SR PHASE IN EXTERNAL START-UP CIRCUIT SOFT STOP POWER GOOD OCP/FEEDBACK RECOVERY OUTPUT VOLTAGE TRACKING REMOTE SYSTEM RESET OCP COUNTER INSULATION LIFETIME LAYOUT GUIDELINES TYPICAL APPLICATION CIRCUITS OUTLINE DIMENSIONS ORDERING GUIDE NOTES