Datasheet AD2420(W), AD2426(W), AD2427(W), AD2428(W), AD2429(W) (Analog Devices) - 9

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AD2420(W) / AD2426(W) /AD2427(W) /AD2428(W) / AD2429(W) ELECTRICAL CHARACTERISTICS Parameter Conditions Min Typ Max Unit
Current IDVDD Digital Core Logic Supply Current VDVDD = 1.98 V 9.0 10.5 12.0 mA IPLLVDD PLL Supply Current VPLLVDD = 1.98 V 0.5 1.1 1.5 mA I 1 TRXVDD Transceiver Supply Current TX enabled, RX disabled, 100% duty cycle 9.5 12.0 13.0 mA (ITXVDD), VTRXVDD = 3.63 V TX disabled, RX enabled, 100% duty cycle 2.2 2.8 3.5 mA (IRXVDD), VTRXVDD = 3.63 V TX disabled, RX disabled, 0% activity level, 1.0 1.7 2.5 mA VTRXVDD = 3.63 V Voltage Regulator (VREG1, VREG2) VVOUT1 VREG1 Output Voltage 1.80 1.90 1.98 V VVOUT2 VREG2 Output Voltage 3.15 3.30 3.45 V I 2 VOUT1 VREG1 Output Current 40.0 mA I 2 VOUT2 VREG2 Output Current 50.0 mA I 3, 4 VEXT1 VREG1 External Device Current IVOUT1 – IPLLVDD – IDVDD – IIOVDD current 20 mA available to external device I 3, 4 VEXT2 VREG2 External Device Current IVOUT2 – ITRXVDD current available to external 20 mA device VOUT1/VIN Line Regulation VVIN = 3.7 V to VIN 0 0.017 0.055 %/V VOUT2/VIN Line Regulation VVIN = 3.7 V to VIN 0.013 0.030 0.060 %/V VVIN = 5.0 V to 8 V –0.025 +0.005 +0.055 %/V VOUT1/IOUT1 Load Regulation VVIN = 5.0 V, IVOUT1 = 1 mA to 40 mA 0.009 0.017 %/mA VOUT2/IOUT2 Load Regulation VVIN = 5.0 V, IVOUT2 = 1 mA to 50 mA 0.008 0.015 %/mA IVINQ Quiescent Current VVIN =VIN, IVOUT1 = 0 mA, IVOUT2 = 0 mA 530 600 750 μA IVIN Operational Current VVIN = VIN, IVOUT1 = 8 mA, IVOUT2 = 20 mA 29 mA CLoad1 VREG1 Load Capacitance 1.0 25 μF CLoad2 VREG2 Load Capacitance 2.2 25 μF Digital I/O IIH Input Leakage, High VIOVDD = 3.63 V, VIN = 3.63 V 10.0 μA IIL Input Leakage, Low VIOVDD = 3.63 V, VIN = 0 V 10.0 μA I 5 OZH_I2C Three-State Leakage Current VIOVDD = 1.9 V, VIN = 3.63 V 10.0 μA VOH1.9 High Level Output Voltage VIOVDD = 1.70 V, IOH = 1 mA 1.35 V VOH3.3 High Level Output Voltage VIOVDD = 3.00 V, IOH = 1 mA 2.40 V V 6 OL Low Level Output Voltage VIOVDD = 3.00 V, IOL = 1 mA 0.40 V V 6 OL Low Level Output Voltage VIOVDD = 1.70 V, IOL = 1 mA 0.40 V V 5, OL_I2C 7 I2C Low Level Output Voltage VIOVDD = 3.00 V, IOL = 1.5 mA 0.40 V V 5, OL_I2C 7 I2C Low Level Output Voltage VIOVDD = 1.70 V, IOL = 1.5 mA 0.40 V CPD Pin Capacitance 4.8 5 pF Negative Bias Switch IVSSN Internal VSSN Switch Current AD2426(W)/AD2427(W)/AD2428(W) 300 mA IVSSN Internal VSSN Switch Current AD2420(W)/AD2429W 100 mA RVSSN Internal VSSN On Resistance 1.2 Ω 1 Master and last slave only consume half the transceiver current because only one of the two TRX blocks is used. 2 In a bus powered system, IVOUT has a direct impact on IVSSN and VVIN in other nodes. For more information, see the Power Analysis section. 3 Consider the package thermal limits when dissipating current above typical limits. For more information, see the Thermal Characteristics section. 4 Must comply with IVOUT1 and IVOUT2 maximum. 5 Applies to SDA and SCL pins. 6 Applies to BCLK, SYNC, DTX0/IO3, DTX1/IO4, DRX0/IO5, DRX1/IO6, ADR1/IO1, ADR2/IO2, IRQ/IO0, PDMCLK/IO7 pins. 7 The minimum IOL current is lower than the I2C specification because the SDA and SCL pins are designed for a limited number of I2C attached slave devices. Rev. B | Page 9 of 38 | January 2020 Document Outline Automotive Audio Bus A2B Transceiver A2B Bus Features A2B Transceiver Features Applications Table of Contents Revision History General Description A2B Bus Details I2C Interface I2S/TDM Interface I2S Reduced Rate Pulse Density Modulation (PDM) Interface GPIO Over Distance Mailboxes Data Slot Exchange Between Slaves Clock Sustain State Programmable Settings to Optimize EMC Performance Programmable LVDS Transmit Levels Spread-Spectrum Clocking Unique ID Support for Crossover or Straight Through Cabling Data Only and Power Only Bus Operation Specifications Operating Conditions Electrical Characteristics Power Supply Rejection Ratio (PSRR) Timing Specifications Power-Up Sequencing Restrictions A2B Bus System Specification RMS Time Interval Error (TIE) Jitter PDM Typical Performance Characteristics Absolute Maximum Ratings Thermal Characteristics ESD Caution Test Circuits and Switching Characteristics Output Drive Currents Test Conditions Output Enable Time Measurement Output Disable Time Measurement Capacitive Loading Pin Configuration and Function Descriptions Power Analysis Current Flow Constant Current PLL Supply Current VIN Quiescent Current IOVDD Current Peripheral Supply Current Digital Logic Supply Current A2B Bus TX/RX Current LVDS Transmitter and Receiver Supply Currents Downstream/Upstream Activity Level LVDS Transmitter and Receiver Idle Current VREG1 and VREG2 Output Currents Current at VIN (IVIN) Power Dissipation Resistance Between Nodes Voltage Regulator Current in Master Node or Local Powered Slave Node Power Dissipation of A2B Bus Power Analysis of Bus Powered System Supply Voltage Reducing Power Consumption Power-Down Mode Standby Mode Control Mode Thermal Power Designer Reference VSENSE and Considerations for Diodes Optional Add On Circuits Layout Guidelines Outline Dimensions Automotive Products Ordering Guide