Datasheet AD2420(W), AD2426(W), AD2427(W), AD2428(W), AD2429(W) (Analog Devices) - 8

link to page 8
AD2420(W) / AD2426(W) /AD2427(W) /AD2428(W) / AD2429(W) SPECIFICATIONS
For information about product specifications, contact your Analog Devices, Inc. representative.
OPERATING CONDITIONS Parameter Conditions Min Nominal Max Unit
Power Supplies VDVDD Digital Core Logic Supply Voltage 1.70 1.90 1.98 V VIOVDD Digital Input/Output (I/O) Supply 3.3 V I/O 3.0 3.3 3.63 V Voltage 1.8 V I/O 1.7 1.9 1.98 V VPLLVDD Phased-Locked Loops (PLL) Supply 1.7 1.9 1.98 V Voltage VTRXVDD Transceiver Supply Voltage Applies to the ATRXVDD and BTRXVDD pins 3.0 3.3 3.63 V VI2C_VBUS External I2C Bus Voltage 3.3 V VIOVDD, 1.8 V VIOVDD 1.7 1.9/3.3 3.63 V Voltage Regulator (VREG1, VREG2) VVIN Regulator Input Supply Voltage Specification must be met at the VIN pin of 3.7 9.0 V each A2B bus transceiver VRST VVIN Chip Reset Assertion Voltage VVIN dropping 2.65 2.97 V Threshold VRSTN VVIN Chip Reset Deassertion Voltage VVIN rising 3.11 3.25 V Threshold Digital I/O V 1 IH High Level Input Voltage VIOVDD = 1.98 V 0.7 × VIOVDD V VIOVDD = 3.63 V 2.2 V V 1 IL Low Level Input Voltage VIOVDD = 1.70 V 0.3 × VIOVDD V VIOVDD = 3.00 V 0.8 V V 2 IH_I2C VIOVDD = 3.63 V, 1.98 V 0.7 × VIOVDD V VIL_I2C VIOVDD = 3.00 V, 1.70 V 0.3 × VIOVDD V Temperature TJ Junction Temperature TAMBIENT = 0°C to 70°C 0 105 °C TJ Junction Temperature TAMBIENT = –40°C to +85°C –40 +105 °C AUTOMOTIVE USE ONLY TJ Junction Temperature TAMBIENT = –40°C to +105°C –40 +1253 °C (Automotive Grade) 1 Applies to PDMCLK/IO7, BCLK, SYNC, DTX0/IO3, DTX1/IO4, DRX0/IO5, DRX1/IO6, ADR1/IO1, ADR2/IO2, IRQ/IO0 pins. 2 Applies to SDA and SCL pins. 3 Automotive application use profile only. Not supported for nonautomotive use. Contact Analog Devices, Inc. for more information. Rev. B | Page 8 of 38 | January 2020 Document Outline Automotive Audio Bus A2B Transceiver A2B Bus Features A2B Transceiver Features Applications Table of Contents Revision History General Description A2B Bus Details I2C Interface I2S/TDM Interface I2S Reduced Rate Pulse Density Modulation (PDM) Interface GPIO Over Distance Mailboxes Data Slot Exchange Between Slaves Clock Sustain State Programmable Settings to Optimize EMC Performance Programmable LVDS Transmit Levels Spread-Spectrum Clocking Unique ID Support for Crossover or Straight Through Cabling Data Only and Power Only Bus Operation Specifications Operating Conditions Electrical Characteristics Power Supply Rejection Ratio (PSRR) Timing Specifications Power-Up Sequencing Restrictions A2B Bus System Specification RMS Time Interval Error (TIE) Jitter PDM Typical Performance Characteristics Absolute Maximum Ratings Thermal Characteristics ESD Caution Test Circuits and Switching Characteristics Output Drive Currents Test Conditions Output Enable Time Measurement Output Disable Time Measurement Capacitive Loading Pin Configuration and Function Descriptions Power Analysis Current Flow Constant Current PLL Supply Current VIN Quiescent Current IOVDD Current Peripheral Supply Current Digital Logic Supply Current A2B Bus TX/RX Current LVDS Transmitter and Receiver Supply Currents Downstream/Upstream Activity Level LVDS Transmitter and Receiver Idle Current VREG1 and VREG2 Output Currents Current at VIN (IVIN) Power Dissipation Resistance Between Nodes Voltage Regulator Current in Master Node or Local Powered Slave Node Power Dissipation of A2B Bus Power Analysis of Bus Powered System Supply Voltage Reducing Power Consumption Power-Down Mode Standby Mode Control Mode Thermal Power Designer Reference VSENSE and Considerations for Diodes Optional Add On Circuits Layout Guidelines Outline Dimensions Automotive Products Ordering Guide