Datasheet LND150, LND250 (Microchip) - 10
| Fabricante | Microchip |
| Descripción | N-Channel Depletion-Mode DMOS FETs |
| Páginas / Página | 16 / 10 — LND150/LND250. 3-Lead TO-236AB (SOT-23) Package Outline (K1/T) … |
| Formato / tamaño de archivo | PDF / 1.3 Mb |
| Idioma del documento | Inglés |
LND150/LND250. 3-Lead TO-236AB (SOT-23) Package Outline (K1/T) 2.90x1.30mm body, 1.12mm height (max), 1.90mm pitch
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LND150/LND250 3-Lead TO-236AB (SOT-23) Package Outline (K1/T) 2.90x1.30mm body, 1.12mm height (max), 1.90mm pitch
D 3 E1 E 0.25 Gauge Plane Seating L 1 2 Plane L1 e b e1
Top View View B
View B A A2 A Seating Plane A1
Side View View A - A
A Note: For the most current package drawings, see the Microchip Packaging Specification at www.microchip.com/packaging.
Symbol A A1 A2 b D E E1 e e1 L L1 ș
MIN 0.89 0.01 0.88 0.30 2.80 2.10 1.20 0.20† 0O Dimension 0.95 1.90 0.54 NOM - - 0.95 - 2.90 - 1.30 0.50 - (mm) BSC BSC REF MAX 1.12 0.10 1.02 0.50 3.04 2.64 1.40 0.60 8O JEDEC Registration TO-236, Variation AB, Issue H, Jan. 1999. † This dimension differs from the JEDEC drawing.
Drawings not to scale.
DS20005454A-page 10 2018 Microchip Technology Inc. Document Outline N-Channel Depletion-Mode DMOS FETs Features Applications General Description Package Types 1.0 Electrical Characteristics Absolute Maximum Ratings† DC Electrical Characteristics AC Electrical Characteristics Temperature Specifications Thermal Characteristics 2.0 Typical Performance Curves FIGURE 2-1: Output Characteristics. FIGURE 2-2: Transconductance vs. Drain Current. FIGURE 2-3: Maximum Rated Safe Operating Area. FIGURE 2-4: Saturation Characteristics. FIGURE 2-5: Power Dissipation vs. Ambient Temperature. FIGURE 2-6: Thermal Response Characteristics. FIGURE 2-7: BVDSS Variation with Temperature. FIGURE 2-8: Transfer Characteristics. FIGURE 2-9: Capacitance vs. Drain-to- Source Voltage. FIGURE 2-10: Drain Current vs. RSOURCE. FIGURE 2-11: VGS(OFF) and RDS Variation with Temperature. FIGURE 2-12: Gate Drive Dynamic Characteristics. 3.0 Pin Description TABLE 3-1: TO-92 Pin Function Table TABLE 3-2: SOT-23 Pin Function Table TABLE 3-3: SOT-89 Pin Function Table 4.0 Functional Description FIGURE 4-1: Switching Waveforms and Test Circuit. TABLE 4-1: Product Summary 5.0 Packaging Information 5.1 Package Marking Information Appendix A: Revision History Revision A (August 2018) Product Identification System Worldwide Sales and Service
D 3 E1 E 0.25 Gauge Plane Seating L 1 2 Plane L1 e b e1
Top View View B
View B A A2 A Seating Plane A1
Side View View A - A
A Note: For the most current package drawings, see the Microchip Packaging Specification at www.microchip.com/packaging.
Symbol A A1 A2 b D E E1 e e1 L L1 ș
MIN 0.89 0.01 0.88 0.30 2.80 2.10 1.20 0.20† 0O Dimension 0.95 1.90 0.54 NOM - - 0.95 - 2.90 - 1.30 0.50 - (mm) BSC BSC REF MAX 1.12 0.10 1.02 0.50 3.04 2.64 1.40 0.60 8O JEDEC Registration TO-236, Variation AB, Issue H, Jan. 1999. † This dimension differs from the JEDEC drawing.
Drawings not to scale.
DS20005454A-page 10 2018 Microchip Technology Inc. Document Outline N-Channel Depletion-Mode DMOS FETs Features Applications General Description Package Types 1.0 Electrical Characteristics Absolute Maximum Ratings† DC Electrical Characteristics AC Electrical Characteristics Temperature Specifications Thermal Characteristics 2.0 Typical Performance Curves FIGURE 2-1: Output Characteristics. FIGURE 2-2: Transconductance vs. Drain Current. FIGURE 2-3: Maximum Rated Safe Operating Area. FIGURE 2-4: Saturation Characteristics. FIGURE 2-5: Power Dissipation vs. Ambient Temperature. FIGURE 2-6: Thermal Response Characteristics. FIGURE 2-7: BVDSS Variation with Temperature. FIGURE 2-8: Transfer Characteristics. FIGURE 2-9: Capacitance vs. Drain-to- Source Voltage. FIGURE 2-10: Drain Current vs. RSOURCE. FIGURE 2-11: VGS(OFF) and RDS Variation with Temperature. FIGURE 2-12: Gate Drive Dynamic Characteristics. 3.0 Pin Description TABLE 3-1: TO-92 Pin Function Table TABLE 3-2: SOT-23 Pin Function Table TABLE 3-3: SOT-89 Pin Function Table 4.0 Functional Description FIGURE 4-1: Switching Waveforms and Test Circuit. TABLE 4-1: Product Summary 5.0 Packaging Information 5.1 Package Marking Information Appendix A: Revision History Revision A (August 2018) Product Identification System Worldwide Sales and Service