Datasheet ACG1F (Cypress) - 4

PRELIMINARY Functional Overview
USB-C Subsystem
This subsystem provides the interface to the Type-C USB port
and comprises the following:
■ USB-PD Physical Layer (only Rp terminations and
Line-Comparators) ■ VCONN FETs ■ ADC ■ Undervoltage, overvoltage, and reverse-current protection on
VBUS ■ High-side current sense amplifier for VBUS with OCP and
short-circuit protection (SCP) ■ VBUS Discharge ■ Gate Driver for VBUS NFET ■ Charger Detect USB-PD Physical Layer
The USB-C subsystem contains the USB-PD physical layer
block and supporting circuits. The USB-PD Physical Layer
consists of only two Deep Sleep comparators that are used to
detect Type-C attach/detach, CC line activity events, and
determine the voltage range on the chosen CC line. In addition,
the block includes Rp termination and their switches as required
by the USB Type-C spec. The Rp termination is implemented
using current sources to indicate the current profiles supported
by DFP.
VCONN FET
ACG1F has power supply input V5V pin for providing power to
EMCA cables through integrated VCONN FETs. There are two
VCONN FETs in ACG1F to power either CC1 or CC2 pins. These
FETs are capable of sourcing maximum of 1.0W on the CC1 or
CC2 pin to power active EMCA cables. At any given time, only
one of the VCONN FETs shall be ON. The floating V5V pin
should not cause ACG1F to malfunction and draw more current.
ADC
ACG1F has one low-footprint 8-bit SAR ADC available for
general purpose A-D conversion applications in the chip. The
ADC can be accessed from the GPIOs through an on-chip
analog mux.
Undervoltage and Overvoltage Protection on VBUS
The chip implements an undervoltage/overvoltage (UVOV)
detection circuit for the VBUS supply. The thresholds for both
OCP and UVOV are made programmable.
High-side Current Sense Amplifier for VBUS
The chip supports the programmable threshold VBUS current
sensing through the VBUS path. External resistor (5 m) placed
in the connector VBUS path connects to the chip, and the drop
across this resistor is monitored to sense the magnitude of
current. Document Number: 002-26356 Rev. *C ACG1F VBUS Reverse Current Protection
ACG1F restricts reverse current to zero on the VBUS provider
path when Type-C VBUS is greater than VIN (provider voltage
before the VBUS NFET). ACG1F reacts quickly (less then 1 µs
-Typ) and turns off the VBUS provider NFET.
VBUS Discharge
The chip supports 21.5-V VBUS discharge circuitry inside the
40-QFN package and 5-V VBUS discharge circuitry inside the
24-QFN package. After cable removal detection, the chip will
discharge the residual charge and bring the floating VBUS back
to 0.8 V.
VBUS Load Switch
ACG1F has an integrated VBUS provider load switch, which
includes OVP, OCP, SCP, RCP protection, and high-side current
sense amplifier. ACG1F supports thermal protection where the
load switch is turned OFF when the on-chip temperature rises
above the threshold temperature and turns ON the load switch
when the device temperature falls below threshold temperature.
Gate Driver for VBUS NFET
ACG1F has an integrated gate driver to drive NFETs on the
VBUS provider path.
Charger Detect
The chip implements battery charger emulation (source) for USB
BC.1.2. MCU and Memory
CPU
The Cortex M0 in ACG1F is part of a 32-bit MCU subsystem,
which is optimized for low-power operation with extensive clock
gating. The CPU also includes a serial wire debug (SWD)
interface, which is a 2-wire form of JTAG. The debug configuration used for ACG1F has 4 break-point (address) comparators
and two watchpoint (data) comparators.
Flash
The 16-KB integrated Flash memory shall store the firmware
implementing Type-C functionality. The 16-KB flash shall support
in-system firmware upgrade through the SWD or I2C interface A
section of Flash can be used for storing Device/System power
parameters.
SROM
The 32-KB SROM contains boot and configuration routines. The
SROM will also be used for storing frequently-used functionalities in the firmware.
SRAM
The 4-KB RAM is used under software control to store temporary
status of system variables and parameters. Page 4 of 27