Datasheet AD8304 (Analog Devices) - 7
| Fabricante | Analog Devices |
| Descripción | 160 dB Range (100 pA –10 mA) Logarithmic Converter |
| Páginas / Página | 20 / 7 — AD8304. 160. 140. MEAN + 3. 120. 100. HITS. DRIFT – mV. MEAN – 3. –40 –30 … |
| Revisión | A |
| Formato / tamaño de archivo | PDF / 587 Kb |
| Idioma del documento | Inglés |
AD8304. 160. 140. MEAN + 3. 120. 100. HITS. DRIFT – mV. MEAN – 3. –40 –30 –20 –10. TEMPERATURE –. LOGARITHMIC INTERCEPT – pA. 180. 196. 198. 200. 202
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AD8304 8 160 140 6 MEAN + 3 120 4 100 2 80 HITS DRIFT – mV 0 OS 60 v –2 40 MEAN – 3 –4 20 –6 0 –40 –30 –20 –10 0 10 20 30 40 50 60 70 80 90 60 80 100 120 140 TEMPERATURE – C LOGARITHMIC INTERCEPT – pA
TPC 19. Output Buffer Offset vs. Temperature TPC 21. Distribution of Logarithmic Intercept, (3σ to Either Side of Mean) Sample 1000
180 180 160 160 140 140 120 120 100 100 HITS HITS 80 80 60 60 40 40 20 20 0 0 196 198 200 202 204 –20 –10 0 10 20 LOGARITHMIC SLOPE – mV/dec INPUT GUARD OFFSET – mV
TPC 20. Distribution of Logarithmic Slope, Sample 1000 TPC 22. Distribution of Input Guard Offset Voltage (VINPT – VSUM), Sample 1000 REV. A –7– Document Outline FEATURES APPLICATIONS PRODUCT DESCRIPTION FUNCTIONAL BLOCK DIAGRAM SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS PIN CONFIGURATION PIN FUNCTION DESCRIPTIONS ORDERING GUIDE Typical Performance Characteristics BASIC CONCEPTS Optical Measurements Decibel Scaling GENERAL STRUCTURE Bandwidth and Noise Considerations Chip Enable USING THE AD8304 Slope and Intercept Adjustments Low Supply Slope and Intercept Adjustment Using the Adaptive Bias Changing the Voltage at the Summing Node Implementing Low-Pass Filters Operation in Comparator Modes Using a Negative Supply APPLICATIONS Summing Node at Ground and Voltage Inputs Providing Negative Outputs and Rescaling Inverting the Slope Programmable Level Comparator with Hysteresis Programmable Multidecade Current Source Characterization Setups and Methods Evaluation Board OUTLINE DIMENSIONS Revision History
TPC 19. Output Buffer Offset vs. Temperature TPC 21. Distribution of Logarithmic Intercept, (3σ to Either Side of Mean) Sample 1000
180 180 160 160 140 140 120 120 100 100 HITS HITS 80 80 60 60 40 40 20 20 0 0 196 198 200 202 204 –20 –10 0 10 20 LOGARITHMIC SLOPE – mV/dec INPUT GUARD OFFSET – mV
TPC 20. Distribution of Logarithmic Slope, Sample 1000 TPC 22. Distribution of Input Guard Offset Voltage (VINPT – VSUM), Sample 1000 REV. A –7– Document Outline FEATURES APPLICATIONS PRODUCT DESCRIPTION FUNCTIONAL BLOCK DIAGRAM SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS PIN CONFIGURATION PIN FUNCTION DESCRIPTIONS ORDERING GUIDE Typical Performance Characteristics BASIC CONCEPTS Optical Measurements Decibel Scaling GENERAL STRUCTURE Bandwidth and Noise Considerations Chip Enable USING THE AD8304 Slope and Intercept Adjustments Low Supply Slope and Intercept Adjustment Using the Adaptive Bias Changing the Voltage at the Summing Node Implementing Low-Pass Filters Operation in Comparator Modes Using a Negative Supply APPLICATIONS Summing Node at Ground and Voltage Inputs Providing Negative Outputs and Rescaling Inverting the Slope Programmable Level Comparator with Hysteresis Programmable Multidecade Current Source Characterization Setups and Methods Evaluation Board OUTLINE DIMENSIONS Revision History