Datasheet ADN2892 (Analog Devices)

3.3 V, 4.25 Gbps, Limiting Amplifier Data Sheet ADN2892 FEATURES GENERAL DESCRIPTION Input sensitivity: 3.5 mV p-p
The ADN2892 is a 4.25 Gbps limiting amplifier with integrated
70 ps rise/fall times
loss of signal (LOS) detection circuitry and a received signal
CML outputs: 750 mV p-p differential
strength indicator (RSSI). This part is optimized for Fibre
Bandwidth selectable for multirate 1×/2×/4× FC modules
Channel (FC) and Gigabit Ethernet (GbE) optoelectronic
Optional LOS output inversion
conversion applications. The ADN2892 has a differential input
Programmable LOS detector: 3.5 mV to 35 mV
sensitivity of 3.5 mV p-p and accepts up to a 2.0 V p-p
Rx signal strength indicator (RSSI)
differential input overload voltage. The ADN2892 has current
SFF-8472-compliant average power measurement
mode logic (CML) outputs with controlled rise and fall times.
Single-supply operation: 3.3 V
The ADN2892 has a selectable low-pass filter with a −3 dB
Low power dissipation: 160 mW
cutoff frequency of 1.5 GHz. By setting BW_SEL to Logic 0, the
Available in space-saving, 3 mm × 3 mm, 16-lead LFCSP
filter can limit the relaxation oscil ation of a low cost CD laser
Extended temperature range: −40°C to +95°C
used in a legacy 1 Gbps FC transmitter. The limited BW also
SFP reference design available
reduces the rms noise and in turn improves the receiver optical sensitivity for a lower data rate application, such as 1× FC and
APPLICATIONS
GbE.
1×, 2×, and 4× FC transceivers
By monitoring the bias current through a photodiode, the on-
SFP/SFF/GBIC optical transceivers
chip RSSI detector measures the average power received with
GbE transceivers
2% typical linearity over the entire valid input range of the
Backplane receivers
photodiode. The on-chip RSSI detector facilitates SFF-8472- compliant optical transceivers by eliminating the need for external RSSI detector circuitry. Additional features include a programmable loss-of-signal (LOS) detector and output squelch. The ADN2892 is available in a 3 mm × 3 mm, 16-lead LFCSP.
FUNCTIONAL BLOCK DIAGRAM AVCC AVEE BW_SEL SQUELCH DRVCC DRVEE ADN2892 50
Ω
50
Ω
OUTP PIN ADN2882 NIN OUTN LPF 50
Ω
50
Ω
V+ 3.5k
Ω
10k
Ω
V LOS REF PD_VCC RSSI/LOS DETECTOR PD_CATHODE RSSI_OUT ADuC7020 THRADJ LOS_INV
04986-001 Figure 1. RSSI Function Capable—Applications Setup Block Diagram
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Document Outline Features Applications General Description Functional Block Diagram Specifications Absolute Maximum Ratings Thermal Resistance ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics Theory of Operation Limiting Amplifier Input Buffer CML Output Buffer Loss-of-Signal (LOS) Detector Received Signal Strength Indicator (RSSI) Squelch Mode BW_SEL (Bandwidth Selection) Mode LOS_INV (Lose of Signal_Invert) Mode Applications Information PCB Design Guidelines Output Buffer Power Supply and Ground Planes PCB Layout Soldering Guidelines for the LFCSP Pad Coating and Pb-Free Soldering Outline Dimensions Ordering Guide