Datasheet MB85AS8MT (Fujitsu) - 7

FabricanteFujitsu
DescripciónMemory ReRAM 8M (1024 K x 8) Bit SPI
Páginas / Página31 / 7 — MB85AS8MT. STATUS REGISTER. Bit No. Bit Name. Function. OP-CODE. Name. …
Formato / tamaño de archivoPDF / 1.6 Mb
Idioma del documentoInglés

MB85AS8MT. STATUS REGISTER. Bit No. Bit Name. Function. OP-CODE. Name. Description. Op-code

MB85AS8MT STATUS REGISTER Bit No Bit Name Function OP-CODE Name Description Op-code

Línea de modelo para esta hoja de datos

Versión de texto del documento

MB85AS8MT

STATUS REGISTER Bit No. Bit Name Function
Status Register Write Protect This is a bit composed of nonvolatile memories (ReRAM). WPEN protects 7 WPEN writing to a status register (refer to “■ WRITING PROTECT”) relating with WP input. Writing with the WRSR command and reading with the RDSR command are possible. Not Used Bits These are bits composed of volatile memories, writing with the WRSR 6 to 4  command is possible. These bits are not used but they are read with the RDSR command. Initial value is “000”. Block Protect 3 BP1 This is a bit composed of nonvolatile memory. This defines size of write protect block for the WRITE command (refer to “■ BLOCK PROTECT”). Writing with the WRSR command and reading with the RDSR command 2 BP0 are possible. Write Enable Latch This indicates ReRAM Array and status register are writable. The WREN command is for setting, and the WRDI command is for resetting. With the RDSR command, reading is possible but writing is not possible with the WRSR command. WEL is reset after the following operations. 1 WEL After power ON. The rising edge of CS after WRDI command recognition. The end of writing process after WRSR command recognition. The end of writing process after WRITE command recognition. Write In Progress This indicates ReRAM Array and status register are in writing process. 0 WIP During this writing process, any commands except RDSR will not be exe- cuted (refer to “2. WIP polling”). With the RDSR command, reading is pos- sible but writing is not possible with the WRSR command. ■
OP-CODE
MB85AS8MT accepts 10 kinds of command specified in op-code. Op-code is a code composed of 8 bits shown in the table below. Do not input invalid codes other than those codes. If CS is risen while inputting op-code, the command are not performed.
Name Description Op-code
WREN Set Write Enable Latch 0000 0110B WRDI Reset Write Enable Latch 0000 0100B RDSR Read Status Register 0000 0101B WRSR Write Status Register 0000 0001B READ Read Memory Code 0000 0011B WRITE Write Memory Code 0000 0010B RDID Read Device ID 1001 1111B RDUID Read Device ID and Unique ID 1000 0011B SLEEP 1011 1001B Enter Sleep Mode (Power Down Mode) PWDN 1110 0010B DS501-00060-1v0-E 7 Document Outline DESCRIPTION FEATURES PIN ASSIGNMENT PIN FUNCTIONAL DESCRIPTIONS BLOCK DIAGRAM SPI MODE SERIAL PERIPHERAL INTERFACE (SPI) STATUS REGISTER OP-CODE COMMAND WRITING OPERATION OF NONVOLATILE MEMORY 1. Address counter control 2. WIP polling BLOCK PROTECT WRITING PROTECT HOLD OPERATION (available only for SOP package) ABSOLUTE MAXIMUM RATINGS RECOMMENDED OPERATING CONDITIONS ELECTRICAL CHARACTERISTICS 1. DC Characteristics 2. AC Characteristics 3. Pin Capacitance TIMING DIAGRAM POWER ON/OFF SEQUENCE ReRAM CHARACTERISTICS ESD AND LATCH-UP MB85AS8MTPF (8-pin plastic SOP) REFLOW CONDITIONS AND FLOOR LIFE CURRENT STATUS ON CONTAINED RESTRICTED SUBSTANCES ORDERING INFORMATION PACKAGE DIMENSION MARKING (11-pin WLP) MARKING (8-pin SOP) PACKING FIGURE 1. Emboss carrier tape and package direction of storage 2. Reel EMBOSS CARRIER TAPE DRAWING