Datasheet 5L2503 (IDT) - 10

5L2503 Datasheet
DC Electrical Characteristics for 1.8V LVCMOS
VDD = 1.8V ±5%, VDDOUTx = 1.8V ±5%, TA = -40°C to 85°C.
Table 18: DC Electrical Characteristics for 1.8V LVCMOS Symbol Parameter Conditions Minimum Typical Maximum Units
VOH Output High Voltage IOH = -8mA. 0.7 × VDDOUTx VDDOUTx V VOL Output Low Voltage IOL = 8mA. 0.25 × VDDOUTx V IOZDD Output Leakage Current Tri-state outputs, 3 μA VDDOUTx = 1.89V. VIH Input High Voltage Single-ended inputs – OE1, 0.65 × VDDOUTx VDDOUTx + 0.3 V SDA, SCL. VIL Input Low Voltage Single-ended inputs – OE1, GND - 0.3 0.35 × VDDOUTx V SDA, SCL. IIN Input Leakage Current OE1 -1 5 μA
AC Electrical Characteristics
VDD1_8 = 1.8V ±5%, VDDO = 1.8V ±5%, TA = -40°C to 85°C; spread spectrum = off.
Table 19. AC Electrical Characteristics Symbol Parameter Conditions Minimum Typical Maximum Units
Input frequency limit when using a crystal. 8 48 MHz f 1 IN Input Frequency Input frequency limit when using LVCMOS 1 125 MHz connected to XIN. fOUT Output Frequency Single-ended clock output limit (LVCMOS). 1 125 MHz t1 Output Duty Cycle LVCMOS clock < 120MHz. 45 55 % Single-ended LVCMOS output clock rise and fal 1.0 t2 Rise/Fall Time ns time, 20% to 80% of VDDO 1.8V. ©2017 Integrated Device Technology, Inc. 10 October 24, 2017 Document Outline Description Typical Applications Features Output Features Key Specifications Block Diagram Pin Assignments Figure 1. Pin Assignments for 2.5 × 2.5 mm 12-DFN – Top View Pin Descriptions Table 1. Pin Descriptions Power Group Table 2. Power Group Output Source Selection Register Settings Table 3. OUT3 Source Table 4. OUT2 Source Table 5. OUT1 Source Table 6. DIV1 Source Device Features and Functions DFC – Dynamic Frequency Control Figure 2. DFC Function Block Diagram Table 7. DFC Function Priority DFC Function Programming PPS – Proactive Power Saving Function Figure 3. PPS Function Block Diagram Figure 4. PPS Assertion/Deassertion Timing Chart PPS Function Programming Input Pin Function Table 8. OE1 Pin Function Table 9. SDA/SCL Function Spread Spectrum ORT – VCO Overshoot Reduction Technology PLL Features and Descriptions Table 10. Output Divider 1 Table 11. Output Dividers 2, 3, and 5 Table 12. Output Divider 4 Output Clock Test Conditions Absolute Maximum Ratings Table 13: Absolute Maximum Ratings Recommended Operating Conditions Table 14: Recommended Operating Conditions Input Capacitance, LVCMOS Output Impedance, and Internal Pull-down Resistance (TA = +25 °C) Table 15: Input Capacitance, LVCMOS Output Impedance, and Internal Pull-down Resistance Recommended Crystal Characteristics Table 16: Crystal Characteristics DC Electrical Characteristics Table 17: DC Electrical Characteristics DC Electrical Characteristics for 1.8V LVCMOS Table 18: DC Electrical Characteristics for 1.8V LVCMOS AC Electrical Characteristics Table 19. AC Electrical Characteristics I2C Bus Characteristics Table 20. I2C Bus DC Characteristics Table 21. I2C Bus AC Characteristics Spread Spectrum Generation Specifications Table 22: Spread Spectrum Generation Specifications General I2C Serial Interface Information Package Drawings Figure 5. NVG12, 2.5 × 2.5 mm 12-DFN Package Drawing – Page 1 Figure 6. NVG12, 2.5 × 2.5 mm 12-DFN Package Drawing – Page 2 Marking Diagram Ordering Information Revision History