InnoSwitch-CPAudible Noise However a smal er capacitor value <22 mF also can be used as long The cycle skipping mode of operation used in the InnoSwitch-CP IC as there is enough bias current into the PRIMARY BYPASS pin during can generate audio frequency components in the transformer. To no-load operation at the lowest rated output voltage such that the limit this audible noise generation the transformer should be designed internal tap does not turn on. such that the peak core flux density is below 3000 Gauss (300 mT). Fol owing this guideline and using the standard transformer produc- Line UV and OV Protection tion technique of dip varnishing practical y eliminates audible noise. Resistors connected from the V pin to the DC BUS enable sensing of Vacuum impregnation of the transformer should not be used due to input voltage to provide line undervoltage and overvoltage protection the high primary capacitance and increased losses that result. Higher for typical universal input applications, a resistor value of approxi- flux densities are possible, however careful evaluation of the audible mately 8 MW is recommended. Figure 21 shows circuit configurations noise performance should be made using production transformer that enable only the line UV or the line OV feature to be selectively samples before approving the design. Ceramic capacitors that use disabled. dielectrics such as Z5U, when used in the clamp circuits and especial y InnoSwitch-CP features a primary sensed OV protection feature that the bias supply (C5 and C9 in Figure 15) may also generate audio can be used to latch off the power supply. Once the power supply is noise. If this is the case, try replacing them with a capacitor having latched off, it can be reset if the V pin current is reduced to zero. a different dielectric or construction, for example a film type for the Once the power supply is latched off, even after input supply is clamp or electrolytic for the bias. turned off, it can take considerable amount of time to reset the Selection of Components InnoSwitch-CP control er as the energy stored in the DC BUS will continue to provide bias supply to the control er. A fast AC reset can Components for InnoSwitch-CP Primary-Side Circuit be achieved using a modified circuit configuration shown in Figure 22. The voltage across capacitor C reduces rapidly after input supply is BPP Capacitor S disconnected which rapidly reduces current into the INPUT VOLTAGE Capacitor connected from the PRIMARY BYAPSS pin of the MONITOR pin of the InnoSwitch-CP IC and resets the InnoSwitch-CP InnoSwitch-CP IC provides decoupling for the primary-side control er controller. and also selects current limit. A 0.1 mF, 10 mF or 1 mF capacitor may be used as indicated in the InnoSwitch-CP data sheet. Though Primary Sensed OVP (Overvoltage Protection) electrolytic capacitors can be used, often surface mount multi-layer The voltage developed across the bias winding output tracks the ceramic capacitors are preferred for use on double sided boards as power supply output voltage. Though not precise, a reasonably they enable placement of capacitors close to the IC and design of accurate detection of output voltage condition can be achieved by the compact switching power supplies. 16 V or 25 V rated X5R or X7R primary-side control er using the bias winding voltage. A Zener diode dielectric capacitors are recommended to ensure minimum capaci- connected from the bias winding output to the PRIMARY BYPASS pin tance requirements are met. can reliably detect a fault condition that leads to increase in output voltage beyond the set limits and causes the primary-side control er Bias Winding and External Bias Circuit to latch off preventing damage of components due to the fault The internal regulator connected from the drain pin of the MOSFET to conditions. the PRIMARY BYPASS pin of the InnoSwitch-CP primary-side control er charges the capacitor connected to the PRIMARY BYPASS pin to It is recommended that the highest voltage at the output of the bias achieve start-up. A bias winding should be provided on the trans- winding should be measured for normal steady-state conditions at full former with a suitable rectifier and filter capacitor to create a bias rated load and lowest rated input voltage and also under transient supply that can be used to supply at least 1 mA of current to the load conditions. A Zener diode rated for 1.25 times this measured PRIMARY BYPASS pin. voltage will typical y ensure that OVP protection will not operate under any normal operating conditions and will only operate in case Turns ratio for the bias winding should be selected such that 9 V is of a fault condition. developed across the bias winding at the lowest rated output voltage of the power supply at the lowest (or no-load) load condition. If the Use of the primary sensed OVP protection is highly recommended. voltage is lower than this, the no-load input power will be higher than expected. Primary-Side Snubber Clamp A snubber circuit should be used on the primary-side as shown in the The bias current from the external circuit should be set to approxi- example circuit. This prevents excess voltage spikes at the drain of mately 300 mA to achieve lowest no-load power consumption when the MOSFET at the instant of turn-off of the MOSFET during each operating the power supply at no-load and 230 VAC input voltage. switching cycle. Though conventional RCD clamps can be used, RCDZ A glass passivated standard recovery rectifier diode with low junction clamps offer the highest efficiency. The circuit example shown in capacitance is recommended to prevent snapped recovery typical of Figure 15 uses RCD clamp with a resistor in series with the clamp fast or ultrafast diodes which typical y leads to higher radiated EMI. diode . This resistor dampens the ringing at the drain and also limits the reverse current through the clamp diode during reverse recovery. A small resistor ranging from 2.2 W to 10 W in series with the bias Standard recover glass passivated diodes with low junction capaci- winding diode is recommended in order to damp the ringing that tance are recommended as these enable partial energy recovery from could get coupled to FORWARD pin from bias winding. Waveforms the clamp thereby improving efficiency. shown in FORWARD Pin Resistor section are the examples for acceptable and unacceptable waveforms on the FORWARD pin during Components for InnoSwitch-CP Secondary-Side Circuit secondary rectifier on period. SECONDARY BYPASS Pin – Decoupling Capacitor A filter capacitor of at least 22 mF with a voltage rating 1.2 times A 2.2 mF, 25 V multi-layer ceramic capacitor should be used for greater than the highest voltage developed across the capacitor is decoupling the SECONDARY BYPASS pin of the InnoSwitch-CP IC. recommended. Highest voltage is typical y developed across this A significantly higher value will lead to output voltage overshoot capacitor when the supply is operated at the highest rated output during start-up and values lower than 1.5 mF may lead to unpredict- voltage and rated load with the lowest input AC supply voltage. able operation. The capacitor must be located adjacent to the IC 10 Rev. F 09/17 www.power.com Document Outline Product Highlights Highly Integrated, Compact Footprint EcoSmart - Energy Efficient Advanced Protection / Safety Features Full Safety and Regulatory Compliance Green Package Applications Description Output Power Table Pin Functional Description InnoSwitch-CP Functional Description InnoSwitch-CP Operation Applications Example Key application Considerations Selection of Components Recommendations for Circuit Board Layout Recommendations for EMI Reduction Recommendations for Audible Noise Suppression Recommendations for Transformer Design Quick Design Checklist Absolute Maximum Ratings Thermal Resistance Key Electrical Characteristics NOTES Typical Performance Characteristics eSOP-R16B Package Package Marking MSL Table ESD and Latch-Up Table Part Ordering Information