Datasheet InnoSwitch-CP (Power Integrations) - 3

InnoSwitch-CP Pin Functional Description
If secondary current sense is not required, the ISENSE pin should be connected to the SECONDARY GROUND pin.
DRAIN (D) Pin (Pin 1)
This pin is the power MOSFET drain connection.
InnoSwitch-CP Functional Description SOURCE (S) Pin (Pin 3-6)
The InnoSwitch-CP combines a high-voltage power MOSFET switch, This pin is the power MOSFET source connection. It is also the along with both primary-side and secondary-side control ers in one ground reference for the PRIMARY BYPASS pin. device. It has a novel inductive coupling feedback scheme using the package leadframe and bond wires to provide a reliable and low-cost
PRIMARY BYPASS (BPP) Pin (Pin 7)
means to provide accurate direct sensing of the output voltage and It is the connection point for an external bypass capacitor for the output current on the secondary to communicate information to the primary-side control er IC supply. primary IC. Unlike conventional PWM (pulse width modulated)
INPUT VOLTAGE MONITOR (V) Pin (Pin 8)
control ers, it uses a simple ON/OFF control to regulate the output A 8 MW resistor is tied between the pin and the input bulk capacitor voltage and current. The primary control er consists of an oscillator, a to provide input under and overvoltage protection. This pin should receiver circuit magnetical y coupled to the secondary control er, current be tied to the PRIMARY BYPASS pin if line UV/OV functionality is not limit state machine, 5.95 V regulator on the PRIMARY BYPASS pin, required. overvoltage circuit, current limit selection circuitry, over temperature protection, leading edge blanking and a 650 V power MOSFET. The
NO CONNECTION (NC) Pin (Pin 9)
InnoSwitch-CP secondary control er consists of a transmitter circuit that This pin should be left open. is magnetical y coupled to the primary receiver, constant voltage (CV) and constant current (CC) control circuitry, a 4.4 V regulator on the
FORWARD (FWD) Pin (Pin 10)
SECONDARY BYPASS pin, synchronous rectifier MOSFET driver, The connection point to the switching node of the transformer output frequency jitter oscillator and a host of integrated protection features. winding for sensing and other functions. Figures 4 and 5 show the functional block diagrams of the primary and
OUTPUT VOLTAGE (VOUT) Pin (Pin 11)
secondary control ers with the most important features. This pin is connected directly to the output voltage of the power
PRIMARY BYPASS Pin Regulator
supply to provide bias to the secondary IC. The PRIMARY BYPASS pin has an internal regulator that charges the
SYNCHRONOUS RECTIFIER DRIVE (SR) Pin (Pin 12)
PRIMARY BYPASS pin capacitor to V by drawing current from the BPP Connection to external SR FET gate terminal. voltage on the DRAIN pin whenever the power MOSFET is off. The PRIMARY BYPASS pin is the internal supply voltage node. When the
SECONDARY BYPASS (BPS) Pin (Pin 13)
power MOSFET is on, the device operates from the energy stored in It is the connection point for an external bypass capacitor for the the PRIMARY BYPASS pin capacitor. Extremely low power consump- secondary-side control er supply. tion of the internal circuitry al ows the InnoSwitch-CP to operate
FEEDBACK (FB) Pin (Pin 14)
continuously from current it takes from the DRAIN pin. This pin connects to an external resistor divider to set the power In addition, there is a shunt regulator clamping the PRIMARY BYPASS supply CV voltage regulation threshold. pin voltage to V when current is provided to the PRIMARY BYPASS SHUNT
SECONDARY GROUND (GND) (Pin 15)
pin through an external resistor. This facilitates powering the Ground connection for the secondary IC. InnoSwitch-CP external y through a bias winding to decrease the no-load consumption to less than 10 mW (5V output design).
ISENSE (IS) Pin (Pin 16)
Connection to the power supply output terminals. An external
PRIMARY BYPASS Pin Capacitor Selection
current sense resistor is connected between this pin and the SECOND- The PRIMARY BYPASS pin can use a ceramic capacitor as small as ARY GROUND pin. 0.1 mF for decoupling the internal power supply of the device. A larger capacitor size can be used to adjust the current limit. A 1 mF capacitor on the PRIMARY BYPASS pin will select a higher current limit equal to the standard current of the next larger device. A 10 mF capacitor on the PRIMARY BYPASS pin selects a lower current limit equal to the standard current limit of the next smal er device.
PRIMARY BYPASS Pin Undervoltage Threshold D 1 16 IS
The PRIMARY BYPASS pin undervoltage circuitry disables the power
15 GND
MOSFET when the PRIMARY BYPASS pin voltage drops below V -V in steady-state operation. Once the PRIMARY BYPASS pin
14 FB
BPP BPP(H) voltage fal s below this threshold, it must rise back to V to enable
13 BPS
BPP
S 3-6
(turn-on) the power MOSFET.
12 SR 11 VOUT PRIMARY BYPASS Pin Output Overvoltage Latching Function
The PRIMARY BYPASS pin has an OV protection latching feature. A
BPP 7 10 FWD
Zener diode in paral el to the resistor in series with the PRIMARY
V 8 9 NC
BYPASS pin capacitor is typical y used to detect an overvoltage on the primary bias winding to activate this protection mechanism. In the event the current into the PRIMARY BYPASS pin exceeds (I ) the SD device will disable the power MOSFET switching. The latching PI-7454-082715 condition is reset by bringing the primary bypass below the reset threshold voltage (V ). BPP(RESET) Figure 6. Pin Configuration.
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