Datasheet ADRF6516 (Analog Devices)
Fabricante | Analog Devices |
Descripción | 31 MHz, Dual Programmable Filters and Variable Gain Amplifiers |
Páginas / Página | 29 / 1 — 31 MHz, Dual Programmable Filters. and Variable Gain Amplifiers. Data … |
Revisión | C |
Formato / tamaño de archivo | PDF / 1.1 Mb |
Idioma del documento | Inglés |
31 MHz, Dual Programmable Filters. and Variable Gain Amplifiers. Data Sheet. ADRF6516. FEATURES. FUNCTIONAL BLOCK DIAGRAM
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31 MHz, Dual Programmable Filters and Variable Gain Amplifiers Data Sheet ADRF6516 FEATURES FUNCTIONAL BLOCK DIAGRAM Matched pair of programmable filters and VGAs ENBL INP1 INM1 VPS COM VICM OFS1 VPS Continuous gain control range: 50 dB Digital gain control: 15 dB 6-pole Butterworth filter: 1 MHz to 31 MHz VPSD OPP1 in 1 MHz steps, 1 dB corner frequency COMD OPM1 Preamplifier and postamplifier gain steps LE COM IMD3: >65 dBc for 1.5 V p-p composite output CLK GAIN HD2, HD3: >65 dBc for 1.5 V p-p output SPI Differential input and output DATA VOCM Flexible output and input common-mode ranges SDO COM Optional dc offset compensation loop COM OPM2 SPI programmable filter corners and gain steps VPS OPP2 ADRF6516 Power-down feature Single 3.3 V supply operation
001
APPLICATIONS COM INP2 INM2 VPS COM OFDS OFS2 VPS
09422- Figure 1.
Baseband IQ receivers Diversity receivers ADC drivers Point-to-point and point-to-multipoint radio Instrumentation Medical GENERAL DESCRIPTION
The ADRF6516 is a matched pair of fully differential, low noise The variable gain amplifiers that follow the filters provide 50 dB and low distortion programmable filters and variable gain of continuous gain control with a slope of 15.5 mV/dB. Their amplifiers (VGAs). Each channel is capable of rejecting large maximum gains can be programmed to various values through out-of-band interferers while reliably boosting the desired signal, the SPI. The output buffers provide a differential output impedance thus reducing the bandwidth and resolution requirements on the of 30 Ω and are capable of driving 2 V p-p into 1 kΩ loads. The analog-to-digital converters (ADCs). The excellent matching output common-mode voltage defaults to VPS/2, but it can be between channels and their high spurious-free dynamic range adjusted down to 700 mV by driving the high impedance over all gain and bandwidth settings make the ADRF6516 ideal VOCM pin. Independent, built-in dc offset compensation loops for quadrature-based (IQ) communication systems with dense can be disabled if fully dc-coupled operation is desired. The constellations, multiple carriers, and nearby interferers. high-pass corner frequency is defined by external capacitors on The filters provide a six-pole Butterworth response with 1 dB the OFS1 and OFS2 pins and the VGA gain. corner frequencies programmable through the SPI port from The ADRF6516 operates from a 3.15 V to 3.45 V supply 1 MHz to 31 MHz in 1 MHz steps. The preamplifier that precedes and consumes a maximum supply current of 360 mA when the filters offers a SPI-programmable option of either 3 dB or 6 dB programmed to the highest bandwidth setting. When disabled, of gain. The preamplifier sets a differential input impedance of it consumes <9 mA. The ADRF6516 is fabricated in an advanced 1600 Ω and has a common-mode voltage that defaults to VPS/2 silicon-germanium BiCMOS process and is available in a 32-lead, but can be driven from 1.1 V to 1.8 V. exposed paddle LFCSP. Performance is specified over the −40°C to +85°C temperature range.
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Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS TIMING DIAGRAMS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS REGISTER MAP AND CODES THEORY OF OPERATION INPUT BUFFERS PROGRAMMABLE FILTERS VARIABLE GAIN AMPLIFIERS (VGAs) OUTPUT BUFFERS/ADC DRIVERS DC OFFSET COMPENSATION LOOP PROGRAMMING THE FILTERS AND GAINS NOISE CHARACTERISTICS DISTORTION CHARACTERISTICS MAXIMIZING THE DYNAMIC RANGE KEY PARAMETERS FOR QUADRATURE-BASED RECEIVERS APPLICATIONS INFORMATION BASIC CONNECTIONS SUPPLY DECOUPLING INPUT SIGNAL PATH OUTPUT SIGNAL PATH DC OFFSET COMPENSATION LOOP ENABLED COMMON-MODE BYPASSING SERIAL PORT CONNECTIONS ENABLE/DISABLE FUNCTION ERROR VECTOR MAGNITUDE (EVM) PERFORMANCE EVM TEST SETUP EFFECT OF FILTER BANDWIDTH ON EVM EFFECT OF OUTPUT VOLTAGE LEVELS ON EVM EFFECT OF COFS VALUE ON EVM EVALUATION BOARD EVALUATION BOARD CONTROL SOFTWARE SCHEMATICS AND ARTWORK OUTLINE DIMENSIONS ORDERING GUIDE