Datasheet ADN2805 (Analog Devices) - 2
| Fabricante | Analog Devices |
| Descripción | 1.25 Gbps Clock and Data Recovery IC |
| Páginas / Página | 16 / 2 — ADN2805. Data Sheet. TABLE OF CONTENTS. REVISION HISTORY. 3/12—Rev. A to … |
| Revisión | B |
| Formato / tamaño de archivo | PDF / 293 Kb |
| Idioma del documento | Inglés |
ADN2805. Data Sheet. TABLE OF CONTENTS. REVISION HISTORY. 3/12—Rev. A to Rev. B. 5/10—Rev. 0 to Rev. A
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ADN2805 Data Sheet TABLE OF CONTENTS
Features .. 1 Theory of Operation .. 10 Applications... 1 Functional Description.. 12 General Description ... 1 Frequency Acquisition... 12 Functional Block Diagram .. 1 Input Buffer... 12 Revision History ... 2 Lock Detector Operation .. 12 Specifications... 3 SQUELCH Mode.. 13 Jitter Specifications... 3 System Reset.. 13 Output and Timing Specifications ... 4 I2C Interface .. 13 Absolute Maximum Ratings.. 6 Applications Information .. 14 Thermal Characteristics .. 6 PCB Design Guidelines ... 14 ESD Caution.. 6 Outline Dimensions ... 16 Pin Configuration and Function Descriptions... 7 Ordering Guide .. 16 I2C Interface Timing and Internal Register Description... 8
REVISION HISTORY 3/12—Rev. A to Rev. B
Updated Outline Dimensions ... 16 Changes to Ordering Guide .. 16
5/10—Rev. 0 to Rev. A
Changes to Figure 5 and Table 6... 7 Changes to Figure 14.. 14 Added Exposed Pad Notation to Outline Dimensions ... 16
1/08—Revision 0: Initial Version
Rev. B | Page 2 of 16 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS JITTER SPECIFICATIONS OUTPUT AND TIMING SPECIFICATIONS Timing Characteristics ABSOLUTE MAXIMUM RATINGS THERMAL CHARACTERISTICS Thermal Resistance ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS I2C INTERFACE TIMING AND INTERNAL REGISTER DESCRIPTION THEORY OF OPERATION FUNCTIONAL DESCRIPTION FREQUENCY ACQUISITION INPUT BUFFER LOCK DETECTOR OPERATION Normal Mode LOL Detector Operation Using a Reference Clock Static LOL Mode SQUELCH MODE SYSTEM RESET I2C INTERFACE APPLICATIONS INFORMATION PCB DESIGN GUIDELINES Power Supply Connections and Ground Planes Transmission Lines Soldering Guidelines for Lead Frame Chip Scale Package OUTLINE DIMENSIONS ORDERING GUIDE
ADN2805 Data Sheet TABLE OF CONTENTS
Features .. 1 Theory of Operation .. 10 Applications... 1 Functional Description.. 12 General Description ... 1 Frequency Acquisition... 12 Functional Block Diagram .. 1 Input Buffer... 12 Revision History ... 2 Lock Detector Operation .. 12 Specifications... 3 SQUELCH Mode.. 13 Jitter Specifications... 3 System Reset.. 13 Output and Timing Specifications ... 4 I2C Interface .. 13 Absolute Maximum Ratings.. 6 Applications Information .. 14 Thermal Characteristics .. 6 PCB Design Guidelines ... 14 ESD Caution.. 6 Outline Dimensions ... 16 Pin Configuration and Function Descriptions... 7 Ordering Guide .. 16 I2C Interface Timing and Internal Register Description... 8
REVISION HISTORY 3/12—Rev. A to Rev. B
Updated Outline Dimensions ... 16 Changes to Ordering Guide .. 16
5/10—Rev. 0 to Rev. A
Changes to Figure 5 and Table 6... 7 Changes to Figure 14.. 14 Added Exposed Pad Notation to Outline Dimensions ... 16
1/08—Revision 0: Initial Version
Rev. B | Page 2 of 16 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS JITTER SPECIFICATIONS OUTPUT AND TIMING SPECIFICATIONS Timing Characteristics ABSOLUTE MAXIMUM RATINGS THERMAL CHARACTERISTICS Thermal Resistance ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS I2C INTERFACE TIMING AND INTERNAL REGISTER DESCRIPTION THEORY OF OPERATION FUNCTIONAL DESCRIPTION FREQUENCY ACQUISITION INPUT BUFFER LOCK DETECTOR OPERATION Normal Mode LOL Detector Operation Using a Reference Clock Static LOL Mode SQUELCH MODE SYSTEM RESET I2C INTERFACE APPLICATIONS INFORMATION PCB DESIGN GUIDELINES Power Supply Connections and Ground Planes Transmission Lines Soldering Guidelines for Lead Frame Chip Scale Package OUTLINE DIMENSIONS ORDERING GUIDE