Datasheet MAX1932 (Maxim) - 8

FabricanteMaxim
DescripciónDigitally Controlled, 0.5% Accurate, Safest APD Bias Supply
Páginas / Página16 / 8 — Output Filter Capacitor Selection. Input Bypass Capacitor Selection. …
Formato / tamaño de archivoPDF / 239 Kb
Idioma del documentoInglés

Output Filter Capacitor Selection. Input Bypass Capacitor Selection. Current-Sense Resistor Selection

Output Filter Capacitor Selection Input Bypass Capacitor Selection Current-Sense Resistor Selection

Línea de modelo para esta hoja de datos

Versión de texto del documento

MAX1932 Digitally Controlled, 0.5% Accurate, Safest APD Bias Supply (<10pF) are recommended to minimize losses. A small- where REA = 310MΩ, signal silicon switching diode is suitable if efficiency is gM = 110µS, not critical. RLD is the parallel combination of feedback network
Output Filter Capacitor Selection
and the load resistance. The output capacitors of the MAX1932 must have high enough voltage rating to operate with the VOUT 2 V V OUT IN required. Output capacitor effective series resistance K1= × - V - V (ESR) determines the amplitude of the high-frequency OUT IN ripple seen on the output voltage. In the typical appli- cation circuit, a second RC formed by R1 and C3 fur- V (Volts) 2 V ther reduces ripple. K FB IN 2 = × × × 0 7 . 5 (Volts) 2 × V - V OUT IN
Input Bypass Capacitor Selection
The input bypass capacitor reduces the peak currents ⎛ ⎛ ⎞ V ⎞ R × T( ond OUT LD sec ) drawn from the voltage source and reduces noise ⎜ ⎟ ⎜ ⎝⎜ V - V ⎠⎟ 2 ×L Henries ( ) ⎟ caused by the MAX1932’s switching action. The input OUT IN ⎝ ⎠ source impedance determines the size of the capacitor A properly compensated MAX1932 results in a gain vs. required at the input (VIN). A low ESR capacitor is rec- frequency plot that crosses 0dB with a single pole ommended. A 1µF ceramic capacitor is adequate for slope (20dB per decade). See Figure 6. most applications. Place the bypass capacitor as close as possible to the VIN and GND pins. Table 1 lists suggested component values for several typical applications.
Current-Sense Resistor Selection
Current limit is used to set the maximum delivered out-
Further Noise Reduction
put current. In the typical application circuit, MAX1932 The current-limit sense resistor is typically used as part is designed to current limit at: of an output lowpass filter to reduce noise and ripple. For further reduction of noise, an LC filter can be added as shown in Figure 7. Output ripple and noise with and V 2 R1= without the LC filter are shown in the Typical Operating ILIMIT Characteristics. If a post LC filter is used, it is best to use a coil with fairly large resistance (or a series resis- Note that ILIMIT must include current drawn by the tor) so that ringing at the response peak of the LC filter feedback divider (if sensing feedback after R1) and the is damped. For a 330µH and 1µF filter, 22 input current of CS-. Ω accom- plishes this, but a resistor is not needed if the coil resis-
Stability and Compensation
tance is greater than 15Ω.
Component Selection Output Accuracy and Feedback
Compensation components, R7 and C4, introduce a
Resistor Selection
pole and a zero necessary to stabilize the MAX1932 The MAX1932 features 0.5% feedback accuracy. The (see Figure 6). The dominant pole, POLE1, is formed by total voltage accuracy of a complete APD bias circuit is the output impedance of the error amplifier (REA) and the sum of the FB set-point accuracy, plus resistor ratio C4. The R7/C4 zero, ZERO1, is selected to cancel the error and temperature coefficient. If absolute accuracy pole formed by the output filter cap C3 and output load is critical, the best resistor choice is an integrated net- RLD, POLE2. The additional pole of R1/C3, POLE3, work with specified ratio tolerance and temperature should be at least a decade past the crossover fre- coefficient. If using discrete resistors in high-accuracy quency to not affect stability: applications, pay close attention to resistor tolerance POLE1 (dominant pole) = 1 / (2π ✕ REA ✕ C4) and temperature coefficients. ZERO1 (integrator zero) = 1 / (2π ✕ R7 ✕ C4)
Temperature Compensation
POLE2 (output load pole) = K1 / (2π ✕ RLD ✕ (C2 + C3)) APDs exhibit a change in gain as a function of temper- POLE3 (output filter pole) = 1 / (2π ✕ R1 ✕ C3) ature. This gain change can be compensated with an The DC open-loop gain is given by: appropriate adjustment in bias voltage. For this reason it may be desirable to vary the MAX1932 output voltage AOL = K2 ✕ Gm ✕ REA as a function of temperature. This can be done in soft- www.maximintegrated.com Maxim Integrated | 8