Datasheet HMC988LP3E (Analog Devices) - 4
| Fabricante | Analog Devices |
| Descripción | Programmable Clock Divider & Delay, DC - 4 GHz |
| Páginas / Página | 22 / 4 — HMC988LP3E. PROGRAMMABLE CLOCK DIVIDER AND DELAY. DC - 4 GHz. TYPICAL … |
| Formato / tamaño de archivo | PDF / 1.3 Mb |
| Idioma del documento | Inglés |
HMC988LP3E. PROGRAMMABLE CLOCK DIVIDER AND DELAY. DC - 4 GHz. TYPICAL PERFORMANCE CHARACTERISTICS
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HMC988LP3E
v04.1014
PROGRAMMABLE CLOCK DIVIDER AND DELAY DC - 4 GHz TYPICAL PERFORMANCE CHARACTERISTICS
unless otherwise specified: t = 27 °C, regulated VDD = 3.3 V, 1.5 GHz, 6 dbm in, AC coupled single ended input and output, 120 Ω/leg DC termination, AC coupled into 50 Ω measuring load.
Figure 1. Phase Noise Performance vs Figure 2. Phase Noise Performance vs
t
Divider Ratio at 1.5 GHz Div 1/2/4/8/16 Temperature at 1.5 GHz Div 2
M -100 -110 s -120 -120 z) z) n - dBc/H -130 dBc/H -140 io OISE ( OISE ( -140 t -160 ASE N ASE N -150 u PH 27C PH Source 85C Div 1(Bypass) -40C -180 Div 2 ib Div 4 -160 Div 8 Div 16 r -170 t -2001 10 100 1000 10000 100000 1 10 100 1000 10000 100000 OFFSET (KHz) OFFSET (KHz) is
Figure 3. Phase Noise Floor Performance Figure 4. Phase Noise Floor Performance Vs Input Swing Vs Output Frequency [1]
k D C -130 -135 -162 lo 100MHz Bypass Single-Ended z) Bypass -140 1500MHz div 2 Single-Ended z) 1500MHz div 2 Differential -164 C dBc/H dBc/H -145 OISE ( -150 OISE ( -166 Divide by 4 Divide by 2 ASE N -155 ASE N PH PH -168 -160 Divide by 8 -165 -170 Instrument Noise Floor -170 100 1000 3000 1 10 100 1000 10000 OUTPUT FREQUNECY (MHz) INPUT SWING (mVpp)
Figure 5. VOUT Vs Frequency over Figure 6. Delay Vs Delay line Setpoint [3] Temperature [2]
2.5 2000 150 MHz 2 27C 85C 1500 1000 MHz -40C pp) V 1.5 ps) 1000 1 DELAY ( Delay OFF OUTPUT LEVEL ( 500 0.5 210 0 0 0 13 26 39 52 60 0.1 1 7 DELAY LINE SETTING OUTPUT FREQUENCY (GHz) [1] Measured Differential input and out at various frequencies. under 300 MHz, the measurment is restricted by the instrument. [2]Measured single-ended. 120 Ω DC termination, 3.3 V 1 +6 dbm single-ended input. HMC988lP3E AC coupled to 50 Ω instrument with divider bypass [3]Corrected for board delay 210 ps Inf F or o m r p atio r n ifc ur e n , d ishe e d lbiv y e A r n y a alog n D d t evic o p es is la beclie o eved rd to ebre sa: H ccur iattti e tae M nd re ilicarbloew . H a o ve C wever, o n rp o For price, delivery, and to place orders: Analog Devices, Inc., responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other oration, 2 Elizabeth Drive, Chelmsford, MA 01824 One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106 Phone: 978-250-3343 Fax: 978-250-3373 O rights of third parties that may result from its use. Specifications subject to change without notice. No P rd hone e r O : 7 n 81- -3li 2n 9 e a -47 t w 0 w 0 • O w rd .h e it r o t niltie n .c e ao t m license is granted by implication or otherwise under any patent or patent rights of Analog Devices. www.analog.com
4
Application Support: Pho Trademarks and registered trademarks are the property of their respective owners. ne: 978-250-33 A 4 p 3 o plica r a tio p n S p u s p @ po h rt itt : P ite ho . n c e o : 1m -800-ANALOG-D
v04.1014
PROGRAMMABLE CLOCK DIVIDER AND DELAY DC - 4 GHz TYPICAL PERFORMANCE CHARACTERISTICS
unless otherwise specified: t = 27 °C, regulated VDD = 3.3 V, 1.5 GHz, 6 dbm in, AC coupled single ended input and output, 120 Ω/leg DC termination, AC coupled into 50 Ω measuring load.
Figure 1. Phase Noise Performance vs Figure 2. Phase Noise Performance vs
t
Divider Ratio at 1.5 GHz Div 1/2/4/8/16 Temperature at 1.5 GHz Div 2
M -100 -110 s -120 -120 z) z) n - dBc/H -130 dBc/H -140 io OISE ( OISE ( -140 t -160 ASE N ASE N -150 u PH 27C PH Source 85C Div 1(Bypass) -40C -180 Div 2 ib Div 4 -160 Div 8 Div 16 r -170 t -2001 10 100 1000 10000 100000 1 10 100 1000 10000 100000 OFFSET (KHz) OFFSET (KHz) is
Figure 3. Phase Noise Floor Performance Figure 4. Phase Noise Floor Performance Vs Input Swing Vs Output Frequency [1]
k D C -130 -135 -162 lo 100MHz Bypass Single-Ended z) Bypass -140 1500MHz div 2 Single-Ended z) 1500MHz div 2 Differential -164 C dBc/H dBc/H -145 OISE ( -150 OISE ( -166 Divide by 4 Divide by 2 ASE N -155 ASE N PH PH -168 -160 Divide by 8 -165 -170 Instrument Noise Floor -170 100 1000 3000 1 10 100 1000 10000 OUTPUT FREQUNECY (MHz) INPUT SWING (mVpp)
Figure 5. VOUT Vs Frequency over Figure 6. Delay Vs Delay line Setpoint [3] Temperature [2]
2.5 2000 150 MHz 2 27C 85C 1500 1000 MHz -40C pp) V 1.5 ps) 1000 1 DELAY ( Delay OFF OUTPUT LEVEL ( 500 0.5 210 0 0 0 13 26 39 52 60 0.1 1 7 DELAY LINE SETTING OUTPUT FREQUENCY (GHz) [1] Measured Differential input and out at various frequencies. under 300 MHz, the measurment is restricted by the instrument. [2]Measured single-ended. 120 Ω DC termination, 3.3 V 1 +6 dbm single-ended input. HMC988lP3E AC coupled to 50 Ω instrument with divider bypass [3]Corrected for board delay 210 ps Inf F or o m r p atio r n ifc ur e n , d ishe e d lbiv y e A r n y a alog n D d t evic o p es is la beclie o eved rd to ebre sa: H ccur iattti e tae M nd re ilicarbloew . H a o ve C wever, o n rp o For price, delivery, and to place orders: Analog Devices, Inc., responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other oration, 2 Elizabeth Drive, Chelmsford, MA 01824 One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106 Phone: 978-250-3343 Fax: 978-250-3373 O rights of third parties that may result from its use. Specifications subject to change without notice. No P rd hone e r O : 7 n 81- -3li 2n 9 e a -47 t w 0 w 0 • O w rd .h e it r o t niltie n .c e ao t m license is granted by implication or otherwise under any patent or patent rights of Analog Devices. www.analog.com
4
Application Support: Pho Trademarks and registered trademarks are the property of their respective owners. ne: 978-250-33 A 4 p 3 o plica r a tio p n S p u s p @ po h rt itt : P ite ho . n c e o : 1m -800-ANALOG-D