Datasheet ADP1850 (Analog Devices)

Wide Range Input, Dual/Two-Phase, DC-to-DC Synchronous Buck Controller Data Sheet ADP1850 FEATURES TYPICAL OPERATION CIRCUIT Wide range input: 2.75 V to 20 V VIN R Power stage input voltage: 1 V to 20 V RAMP1 Output voltage range: 0.6 V up to 90% V IN RAMP1 VIN Output current to more than 25 A per channel ADP1850 Accurate current sharing between channels (interleaved) M1 EN1 DH1 L1 Programmable frequency: 200 kHz to 1.5 MHz EN2 BST1 VDL VOUT1 180° phase shift between channels for reduced input SW1 R11 ILIM1 capacitance VCCO FB1 TRK1 ±0.85% reference voltage accuracy from −40°C to +85°C TRK2 M2 DL1 R12 Integrated boost diodes RCSG1 PGOOD1 Power saving mode (PSM) at light loads PGOOD2 PGND1 SYNC HI Accurate power good with internal pull-up resistor RRAMP2 FREQ LO RAMP2 VIN Accurate voltage tracking capability M3 Independent channel precision enable DH2 L2 COMP1 Overvoltage and overcurrent limit protection BST2 COMP2 VOUT2 Externally programmable soft start, slope compensation and SW2 R21 ILIM2 current sense gain FB2 M4 Synchronization input SS1 DL2 SS2 R22 Thermal overload protection RCSG2 AGND PGND2 Input undervoltage lockout (UVLO)
001
Available in 32-lead 5 mm × 5 mm LFCSP
09440- Figure 1. Single Phase Circuit
APPLICATIONS
The ADP1850 provides high speed, high peak current drive
High current single and dual output intermediate bus and
capability with dead-time optimization to enable energy
point of load converters requiring sequencing and
efficient power conversion. For low load operation, the device
tracking capability, including converters for:
can be configured to operate in power saving mode (PSM) by
Point-of-load power supplies
skipping pulses and reducing switching losses to improve the
Telecom base station and networking
energy efficiency at light load and standby conditions.
Consumer
The accurate current limit (±6%) al ows the power architect to
Industrial and instrumentation
design within a narrower range of tolerances and can reduce
Healthcare and medical
overall converter size and cost.
GENERAL DESCRIPTION
The ADP1850 provides a configurable architecture capable The ADP1850 is a configurable dual output or two-phase, single of wide range input operation to provide the designer with output dc-to-dc synchronous buck controller capable of running maximum re-use opportunities and improved time to market. from commonly used 3.3 V to 12 V (up to 20 V) voltage inputs. Additional flexibility is provided by external programmability The device operates in current mode for improved transient of loop compensation, soft start, frequency setting, power response and uses val ey current sensing for enhanced noise saving mode, current limit and current sense gain can all be immunity. programmed using external components. The architecture enables accurate current sharing between The ADP1850 includes a high level of integration in a small size interleaved phases for high current outputs. package. The start-up linear regulator and the boot-strap diode The ADP1850 is ideal in system applications requiring multiple for the high side drive are included. Protection features include: output voltages: the ADP1850 includes a synchronization fea- undervoltage lock-out, overvoltage, overcurrent/short-circuit ture to eliminate beat frequencies between switching devices; and over temperature. The ADP1850 is available in a compact provides accurate tracking capability between supplies and 32-lead LFCSP 5 mm × 5 mm thermally enhanced package. includes precision enable for simple, robust sequencing.
Rev. C Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Tel: 781.329.4700 ©2010–2017 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. Technical Support www.analog.com
Document Outline Features Applications General Description Typical Operation Circuit Revision History Specifications Absolute Maximum Ratings ESD Caution Simplified Block Diagram Pin Configuration and Function Descriptions Typical Performance Characteristics Theory of Operation Control Architecture Oscillator Frequency Modes of Operation Synchronization Synchronous Rectifier and Dead Time Input Undervoltage Lockout Internal Linear Regulator Overvoltage Protection Power Good Short-Circuit and Current-Limit Protection Shutdown Control Thermal Overload Protection Applications Information Setting the Output Voltage Soft Start Setting the Current Limit Accurate Current-Limit Sensing Setting the Slope Compensation Setting the Current Sense Gain Input Capacitor Selection Input Filter Boost Capacitor Selection Inductor Selection Output Capacitor Selection MOSFET Selection Loop Compensation (Single Phase Operation) Configuration and Loop Compensation (Dual-Phase Operation) Switching Noise and Overshoot Reduction Voltage Tracking Coincident Tracking Ratiometric Tracking Indepdendent Power Stage Input Voltage PCB Layout Guidelines MOSFETs, Input Bulk Capacitor, and Bypass Capacitor High Current and Current Sense Paths Signal Paths PGND Plane Feedback and Current-Limit Sense Paths Switch Node Gate Driver Paths Output Capacitors Typical Operating Circuits Outline Dimensions Ordering Guide