Datasheet LTC3447 (Analog Devices) - 9

LTC3447
U OPERATIO External Start-Up Option
out an address on the bus and wait to see if another device responds to it. After a response is detected, meaningful The LTC3447 allows for the use of optional external resistors data can be exchanged between the parts. to determine the start-up voltage. Using this option, the start-up voltage can be set to levels inside or outside the Typically, one device will control the clock line at least most DAC output’s operating range. The output voltage will be of the time and will normally be sending data to the other regulated at this value until the internal DAC is updated and parts and polling them to send data back to it, and this a STOP command is received. Once the STOP command is device is called the master. There can certainly be more received, the internal DAC will retain control of the output than one master, since there is an effective protocol to voltage until the part is disabled then enabled again. resolve bus contentions, and nonmaster (slave) devices can also control the clock to delay rising edges and give If this feature is not used, the feedback pin must be tied themselves more time to complete calculations or com- to VIN. munications (clock stretching). Slave devices need to be
I2C OPERATION
able to control the data line to acknowledge communica- tions from the master, and some devices will need to able n Typical 2-wire serial I2C to send data back to the master; they will be in control of n Serial interface the data line while they are doing so. Many slave devices n Simple 2-wire interface will have no need to stretch the clock signal and will have n Multiple devices on same bus no ability to pull the clock line low, which is the case with n Idle bus must have SDA and SCL lines high the LTC3447. n LTC3447 is write only n Master controls bus Data is exchanged in the form of bytes, which are 8-bit n Devices listen for unique address that precedes data packets. Every byte needs to be acknowledged by the
General I2C Bus/SMBus Description
slave (data line pulled low) or not acknowledged by the master (data line left high), so communications are bro- I2C Bus and SMBus are reasonably similar examples of ken up into 9-bit segments, one byte followed by one bit two wire, bidirectional, serial communications busses. for acknowledging. For example, sending out an address Calling them two wire is not strictly accurate, as there consists of 7-bits of device address, 1-bit that signals is an implied third wire, which is the ground line. Large whether a read or write operation will be performed, and ground drops or spikes between the grounds of different then 1 more bit to allow the slave to acknowledge. There parts on the bus can interrupt or disrupt communica- is no theoretical limit to how many total bytes can be tions, as the signals on the two wires are both inherently exchanged in a given transmission. referenced to a ground which is expected to be common to all parts on the bus. Both bus types have one data line I2C and SMBus are very similar specifi cations, SMBus hav- and one clock line which are externally pulled to a high ing been derived from I2C. In general, SMBus is targeted voltage when they are not being controlled by a device on toward low power devices (particularly battery powered the bus. The devices on the bus can only pull the data and ones) and emphasizes low power consumption, while I2C clock lines low, which makes it simple to detect if more is targeted toward higher speed systems where the power than one device is trying to control the bus; eventually, a consumption of the bus is not so critical. I2C has three dif- device will release a line and it will not pull high because ferent specifi cations for three different maximum speeds, another device is still holding it low. Pull-ups for the data these being standard mode (100kHz max), fast mode and clock lines are usually provided by external discrete (400kHz max), and HS mode (3.4MHz max). Standard and resistors, but external current sources can also be used. fast mode are not radically different, but HS mode is very Since there are no dedicated lines to use to tell a given different from a hardware and software perspective and device if another device is trying to communicate with it, requires an initiating command at standard or fast speed each device must have a unique address to which it will before data can start transferring at HS speed. SMBus respond. The fi rst part of any communication is to send simply specifi es a 100kHz maximum speed. 3447f 9