Datasheet ADP2102 (Analog Devices) - 5

Data Sheet ADP2102 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS MODE 1 8 AVIN EN 2 7 PVIN ADP102 FB/OUT 3 TOP VIEW 6 LX (Not to Scale) AGND 4 5 PGND
003
NOTES 1. CONNECT THE EXPOSED PAD TO THE GROUND PLANE.
06631- Figure 3. Pin Configuration
Table 4. Pin Function Descriptions Pin No. Mnemonic Description
1 MODE Mode Input. To set the ADP2102 to forced continuous conduction mode (CCM), drive MODE high. To set the ADP2102 to power save mode/auto mode (PSM), drive MODE low. 2 EN Enable Input. Drive EN high to turn on the ADP2102. Drive EN low to turn it off and reduce the input current to 0.1 µA. This pin cannot be left floating. 3 FB/OUT Output Sense Input or Feedback Input. For the fixed output voltage versions, OUT is the top of the internal resistive voltage divider. Connect OUT to the output voltage. For the adjustable output voltage versions (no suffix), FB is the input to the error amplifier. Drive FB through a resistive voltage divider to set the output voltage. The FB regulation threshold is 0.8 V. 4 AGND Analog Ground. Connect AGND to PGND at a single point as close to the ADP2102 as possible. The exposed pad is electrically common with the analog ground pin. 5 PGND Power Ground. 6 LX Switch Output. LX is the drain of the P-channel MOSFET switch and the N-channel synchronous rectifier. Connect the output LC filter between LX and the output voltage. 7 PVIN Power Source Input. Drive PVIN with a 2.7 V to 5.5 V power source. A ceramic bypass capacitor of 2.2 µF or greater is required on this pin to the nearest PGND plane. 8 AVIN Power Source Input. AVIN is the supply for the ADP2102 internal circuitry. This pin can be connected in three different ways. For noise reduction, place an external RC filter between PVIN and AVIN. The recommended values for the external RC filter are 10 Ω and 0.1 µF, respectively. This configuration can be used for all loads. For light-to-medium loads up to 300 mA, the AVIN pin and the PVIN pin can be shorted together. For light-to-heavy loads (greater than 300 mA), bypass the AVIN pin with a 1 pF to 0.01 µF capacitor to the nearest PGND plane. Do not short the AVIN and PVIN pins when using only a bypass capacitor. 0 EPAD Exposed Pad. Connect the exposed pad to the ground plane. Rev. C | Page 5 of 24 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION TYPICAL APPLICATION CIRCUIT REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE BOUNDARY CONDITION ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION CONTROL SCHEME CONSTANT ON-TIME TIMER FORCED CONTINUOUS CONDUCTION MODE POWER SAVE MODE SYNCHRONOUS RECTIFICATION CURRENT LIMIT SOFT START ENABLE UNDERVOLTAGE LOCKOUT THERMAL SHUTDOWN APPLICATIONS INFORMATION INDUCTOR SELECTION INPUT CAPACITOR SELECTION OUTPUT CAPACITOR SELECTION TYPICAL APPLICATION CIRCUITS SETTING THE OUTPUT VOLTAGE EFFICIENCY CONSIDERATIONS Power Switch Conduction Losses Inductor Losses Switching Losses Transition Losses THERMAL CONSIDERATIONS DESIGN EXAMPLE Inductor Output Capacitor Input Capacitor Losses CIRCUIT BOARD LAYOUT RECOMMENDATIONS RECOMMENDED LAYOUT OUTLINE DIMENSIONS ORDERING GUIDE