Datasheet LTC3546 (Analog Devices) - 10

LTC3546
PIN FUNCTIONS (UFD/FE) BMC2 (Pin 1/Pin 4):
Burst Mode Clamp for Channel 2.
SW2B (Pin 11/Pin 14):
Half of the switch node connec- Connecting this pin to an external voltage between 0V and tion to the inductor for Channel 2 SW2A and SW2B must 0.6V sets the Burst Mode clamp level. If this pin is pulled be externally tied together. This pin swings from VIN2 to to VCCA, an internal Burst Mode clamp level is used. This PGND2. pin should be tied to GND when Burst Mode operation is
SW1D (Pin 12/Pin 15):
The Dependent Switch Node not selected. Connection. The pin is externally connected to SW1 for
TRACK/SS2 (Pin 2/Pin 5):
Tracking input for Channel 2 a 2A/2A regulator or to SW2A/B for a 3A/1A regulator. output or optional external soft-start input. VOUT2 wil track Internal circuitry detects which pin SW1D is externally an external voltage at this pin. Leaving this pin floating connected to, SW1 or SW2A/B. This pin swings from allows VOUT2 to start-up using the internal soft-start. An VIN1D to PGND1D. SW1D switching will be controlled external soft-start can be programmed by connecting a by the output switch to which it is connected, i.e., SW1 capacitor between this pin and ground. External soft-start or SW2A/SW2B. The dependant 1A power stage can be ramp time must be greater than the internal soft-start time disabled by floating the SW1D pin. The SW1D pin must of 1.2ms. Refer to the Applications Information section never be connected to VIN or GND. When disabled, SW1D for more details. is pulled high internally.
VFB2 (Pin 3/Pin 6):
Feedback voltage from external resis-
SW1 (Pin 13/Pin 16):
The switch node connection to the tive divider from the Channel 2 regulator output. Nominal Inductor for the Channel 1 regulator. This pin swings from voltage for this pin is 0.6V. VIN1 to PGND1.
ITH2 (Pin 4/Pin 7):
Error Amplifier Compensation for Chan-
PGND1D (Pin 14/Pin 17):
Ground for SW1D Switching nel 2 Regulator. Peak current increases with an increase N-Channel Driver. in the voltage on this pin. Nominal voltage range for this
PGND1 (Pin 15/Pin 18):
Ground for SW1 Switching N- pin is 0V to 1.5V. Channel Driver.
VCCD (Pin 5/Pin 8):
Supply Pin for Internal Digital Cir-
PGND2 (Pin 16/Pin 19):
Ground for SW2A and SW2B cuitry. Switching N-Channel Driver.
RUN2 (Pin 6/Pin 9):
Low Level Logic Input. Enable for
RUN1 (Pin 17/Pin 20):
Low Level Logic Input. Enable for Channel 2. When pulled high, regulator is running. When Channel 1. When pulled high, regulator is running. When at 0V, regulator is off. When both RUN1 and RUN2 are at at 0V, regulator is off. When both RUN1 and RUN2 are at 0V the part is in shutdown. 0V the part is in shutdown.
VIN2 (Pin 7/Pin 10):
Supply pin for 2A P-channel switch
PHASE (Pin 18/Pin 21):
Low Level Logic Input. Selects which connects from VIN2 to SW2A/B. Channel 2 regulator switching phase with respect to
VIN1 (Pin 8/Pin 11):
Supply pin for 1A P-channel switch Channel 1 regulator switching. When pulled high, the which connects from VIN1 to SW1. SW1 regulator and the SW2A/B regulator are in phase.
V
When PHASE is at 0V the SW1 regulator and the SW2A/B
IN1D (Pin 9/Pin 12):
Supply pin for 1A dependent P-chan- nel switch which connects from V regulator are switching 180° out-of-phase. IN1D to SW1D.
SW2A (Pin 10/Pin 13):
Half of the switch node connec-
ITH1 (Pin 19/Pin 22):
Error Amplifier Compensation for tion to the inductor for Channel 2. SW2A and SW2B must Channel 1. Peak current increases with an increase in the be externally tied together. This pin swings from V voltage on this pin. Nominal voltage range for this pin is IN2 to PGND2. 0V to 1.5V. 3546fd 10 For more information www.linear.com/3546