Datasheet ADP2325 (Analog Devices) - 7

Data Sheet ADP2325 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS 1 P 1 1 1 M 1 1 IN IN RK1 FB CO SS T EN PV PV SW1 32 31 30 29 28 27 26 25 PGOOD1 1 24 SW1 SCFG 2 23 BST1 SYNC 3 22 DL1 ADP2325 GND 4 21 PGND TOP VIEW INTVCC 5 20 VDRV (Not to Scale) RT 6 19 DL2 MODE 7 18 BST2 PGOOD2 8 17 SW2 9 10 11 12 13 14 15 16 2 2 2 2 2 2 2 P K FB IN IN M SS2 EN TR SW PV PV CO NOTES
4 00
1. THE EXPOSED PAD SHOULD BE SOLDERED
6- 03
TO AN EXTERNAL GND PLANE.
10 Figure 4. Pin Configuration (Top View)
Table 4. Pin Function Descriptions Pin No. Mnemonic Description
1 PGOOD1 Power-Good Output (Open Drain) for Channel 1. A pull-up resistor of 10 kΩ to 100 kΩ is recommended. 2 SCFG Synchronization Configuration Input. The SCFG pin configures the SYNC pin as an input or an output. Connect SCFG to INTVCC to configure SYNC as an output. Connecting a pull-down resistor to GND configures SYNC as an input with various phase shift degrees. 3 SYNC Synchronization. This pin can be configured as an input or an output. When configured as an output, it provides a clock at the switching frequency. When configured as an input, this pin accepts an external clock to which the regulators are synchronized. The phase shift is configured by SCFG. Note that when SYNC is configured as an input, the PFM mode is disabled and the device works in continuous conduction mode (CCM) only. 4 GND Analog Ground. Connect to the ground plane. 5 INTVCC Internal 5 V Regulator Output. The IC control circuits are powered from this voltage. Place a 1 μF ceramic capacitor between INTVCC and GND. 6 RT Connect a resistor between RT and GND to program the switching frequency from 250 kHz to 1.2 MHz. 7 MODE Mode Selection. When this pin is connected to INTVCC, the PFM mode is disabled and the regulator works only in CCM. When this pin is connected to ground, the PFM mode is enabled. If the low-side device is a diode, the MODE pin must be connected to ground. 8 PGOOD2 Power-Good Output (Open Drain) for Channel 2. A pull-up resistor of 10 kΩ to 100 kΩ is recommended. 9 FB2 Feedback Voltage Sense Input for Channel 2. Connect FB2 to a resistor divider from the Channel 2 output voltage, VOUT2. Connect FB2 to INTVCC for parallel applications. 10 COMP2 Error Amplifier Output for Channel 2. Connect an RC network from COMP2 to GND. Connect COMP1 and COMP2 together for parallel applications. 11 SS2 Soft Start Control for Channel 2. To program the soft start time, connect a capacitor from SS2 to GND. For parallel applications, SS2 remains open. 12 TRK2 Tracking Input for Channel 2. To track a master voltage, connect this pin to a resistor divider from the master voltage. If the tracking function is not used, connect TRK2 to INTVCC. 13 EN2 Enable Pin for Channel 2. An external resistor divider can be used to set the turn-on threshold. When not using the enable pin, connect EN2 to PVIN2. 14, 15 PVIN2 Power Input for Channel 2. Connect PVIN2 to the input power source, and connect a bypass capacitor between PVIN2 and ground. 16, 17 SW2 Switch Node for Channel 2. 18 BST2 Supply Rail for the Gate Drive of Channel 2. Place a 0.1 μF capacitor between SW2 and BST2. 19 DL2 Low-Side Gate Driver Output for Channel 2. Connect a resistor between DL2 and PGND to program the current- limit threshold of Channel 2. 20 VDRV Low-Side Driver Supply Input. Connect VDRV to INTVCC. Place a 1 μF ceramic capacitor between the VDRV pin and PGND. 21 PGND Driver Power Ground. Connect to the source of the synchronous N-channel MOSFET. 22 DL1 Low-Side Gate Driver Output for Channel 1. Connect a resistor between DL1 and PGND to program the current- limit threshold of Channel 1. 23 BST1 Supply Rail for the Gate Drive of Channel 1. Place a 0.1 μF capacitor between SW1 and BST1. Rev. A | Page 7 of 32 Document Outline Features Applications Typical Application Circuit General Description Revision History Functional Block Diagram Specifications Absolute Maximum Ratings Thermal Resistance Boundary Condition ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics Theory of Operation Control Scheme PWM Mode PFM Mode Precision Enable/Shutdown Separate Input Voltages Internal Regulator (INTVCC) Bootstrap Circuitry Low-Side Driver Oscillator Synchronization Soft Start Peak Current-Limit and Short-Circuit Protection Voltage Tracking Coincident Tracking Ratiometric Tracking Parallel Operation Power Good Overvoltage Protection Undervoltage Lockout Thermal Shutdown Applications Information ADIsimPower Design Tool Input Capacitor Selection Output Voltage Setting Voltage Conversion Limitations Current-Limit Setting Inductor Selection Output Capacitor Selection Low-Side Power Device Selection Programming the UVLO Input Compensation Components Design Design Example Output Voltage Setting Current-Limit Setting Frequency Setting Inductor Selection Output Capacitor Selection Low-Side MOSFET Selection Compensation Components Soft Start Time Programming Input Capacitor Selection External Components Recommendations Typical Application Circuits Packaging and Ordering Information Outline Dimensions Ordering Guide