Datasheet ADP2325 (Analog Devices)
Fabricante | Analog Devices |
Descripción | Dual 5 A, 20 V Synchronous Step-Down Regulator with Integrated High-Side MOSFET |
Páginas / Página | 32 / 1 — Dual 5 A, 20 V Synchronous Step-Down. Regulator with Integrated High-Side … |
Revisión | A |
Formato / tamaño de archivo | PDF / 810 Kb |
Idioma del documento | Inglés |
Dual 5 A, 20 V Synchronous Step-Down. Regulator with Integrated High-Side MOSFET. Data Sheet. ADP2325. FEATURES
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Dual 5 A, 20 V Synchronous Step-Down Regulator with Integrated High-Side MOSFET Data Sheet ADP2325 FEATURES TYPICAL APPLICATION CIRCUIT Input voltage: 4.5 V to 20 V ±1% output accuracy R V TOP1 IN C C C1 IN1 Integrated 48 mΩ typical high-side MOSFET CSS1 Flexible output configuration RBOT1 RC1 Dual output: 5 A/5 A 1 1 C INTVCC BST1 B1 N1 N T Parallel single output: 10 A CINT F MP1 SS1 E L1 V MODE BS OUT1 O PVI SW1 C Programmable switching frequency: 250 kHz to 1.2 MHz SCFG M1 TRK2 C External synchronization input with programmable phase OUT1 DL1 TRK1 shift or internal clock output VDRV C ADP2325 PGND DRV Selectable PWM or PFM mode operation GND M2 Adjustable current limit for small inductors DL2 COUT2 PGOOD2 External compensation and soft start L2 V PGOOD1 OUT2 SW2 Startup into precharged output SYNC 2 2 RT MP2 N T Supported by ADIsimPower™ design tool B2 O N2 C R F C SS2 E PVI BS BST2 OSC APPLICATIONS RC2 RBOT2 VIN Communications infrastructure C C C2 SS2 CIN2 RTOP2
001
Networking and servers
10036-
Industrial and instrumentation
Figure 1.
Healthcare and medical Intermediate power rail conversion GENERAL DESCRIPTION
The ADP2325 is a full featured, dual output, step-down dc-to-dc Independent enable inputs and power-good outputs provide regulator based on a current mode architecture. The ADP2325 reliable power sequencing. To enhance system reliability, the device integrates two high-side power MOSFETs and two low-side drivers includes undervoltage lockout (UVLO), overvoltage protection for the external N-channel MOSFETs. The two pulse-width mod- (OVP), overcurrent protection, and thermal shutdown. ulation (PWM) channels can be configured to deliver dual 5 A The ADP2325 operates over the −40°C to +125°C junction outputs or a parallel-to-single 10 A output. The regulator operates temperature range and is available in a 32-lead LFCSP_WQ from input voltages of 4.5 V to 20 V, and the output voltage can package. be as low as 0.6 V.
100 V
The switching frequency can be programmed from 250 kHz to
OUT = 5.0V V 95 OUT = 3.3V
1.2 MHz, or it can be synchronized to an external clock to
90
minimize interference in multirail applications. The dual PWM channels run 180° out of phase, thereby reducing input current
85
ripple as well as reducing the size of the input capacitor.
%) ( 80 Y C N
The bidirectional synchronization pin can be programmed at
75 IE
a 60°, 90°, or 120° phase shift to provide for a stackable, multi-
70 FFIC E
phase power solution.
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The ADP2325 can be configured to operate in pulse frequency
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modulation (PFM) mode at a light load for higher efficiency or
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in forced PWM mode for noise sensitive applications. External
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compensation and soft start provide design flexibility.
0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
002
OUTPUT CURRENT (A)
10036- Figure 2. Efficiency vs. Output Current at VIN = 12 V, fSW = 600 kHz
Rev. A Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Tel: 781.329.4700 www.analog.com Trademarks and registered trademarks are the property of their respective owners. Fax: 781.461.3113 ©2012 Analog Devices, Inc. All rights reserved.
Document Outline Features Applications Typical Application Circuit General Description Revision History Functional Block Diagram Specifications Absolute Maximum Ratings Thermal Resistance Boundary Condition ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics Theory of Operation Control Scheme PWM Mode PFM Mode Precision Enable/Shutdown Separate Input Voltages Internal Regulator (INTVCC) Bootstrap Circuitry Low-Side Driver Oscillator Synchronization Soft Start Peak Current-Limit and Short-Circuit Protection Voltage Tracking Coincident Tracking Ratiometric Tracking Parallel Operation Power Good Overvoltage Protection Undervoltage Lockout Thermal Shutdown Applications Information ADIsimPower Design Tool Input Capacitor Selection Output Voltage Setting Voltage Conversion Limitations Current-Limit Setting Inductor Selection Output Capacitor Selection Low-Side Power Device Selection Programming the UVLO Input Compensation Components Design Design Example Output Voltage Setting Current-Limit Setting Frequency Setting Inductor Selection Output Capacitor Selection Low-Side MOSFET Selection Compensation Components Soft Start Time Programming Input Capacitor Selection External Components Recommendations Typical Application Circuits Packaging and Ordering Information Outline Dimensions Ordering Guide