Datasheet ADP2443 (Analog Devices) - 7

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Data Sheet ADP2443 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS ADP2443 TOP VIEW (Not to Scale) NC P Y S N / GOOD SS RAM RT P EN PVI 24 23 22 21 20 19 COMP 1 18 PVIN FB 2 17 PVIN 25 VREG 3 GND 16 PVIN GND 4 15 BST SW 5 26 14 SW SW SW 6 13 PGND 7 8 9 10 11 12 SW ND ND ND ND ND G G G G G P P P P P NOTES 1. EXPOSED GND PAD. THE EXPOSED GND PAD MUST BE SOLDERED TO A LARGE, EXTERNAL, COPPER GND PLANE TO REDUCE THERMAL RESISTANCE. 2. EXPOSED SW PAD. THE EXPOSED SW PAD MUST BE CONNECTED TO THE SW PINS OF THE ADP2443 BY USING SHORT, WIDE TRACES, OR SOLDERED
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TO A LARGE EXTERNAL SW COPPER PLANE TO REDUCE THERMAL RESISTANCE.
14794- Figure 4. Pin Configuration
Table 4. Pin Function Descriptions Pin No. Mnemonic Description
1 COMP Error Amplifier Output. Connect an RC network from COMP to GND. 2 FB Feedback Voltage Sense Input. Connect this pin to a resistor divider from the output voltage (VOUT). 3 VREG Output of the Internal 5 V Regulator. The control circuits are powered from the voltage on this pin. Place a 1 µF, X7R or X5R ceramic capacitor between this pin and GND. 4 GND Analog Ground. Return of internal control circuit. 5, 6, 7, 14 SW Switch Node Output. Connect these pins to the output inductor. 8 to 13 PGND Power Ground. Return of low-side power MOSFET. 15 BST Supply Rail for the High-Side Gate Drive. Place a 0.1 µF, X7R or X5R capacitor between SW and BST. 16 to 19 PVIN Power Input. Connect these pins to the input power source and connect a bypass capacitor between these pins and PGND. 20 EN Precision Enable Pin. An external resistor divider can be used to set the turn-on threshold. To enable the device automatically, connect the EN pin to the PVIN pin. 21 PGOOD Power-Good Output (Open-Drain). A pull-up resistor of 10 kΩ to 100 kΩ is recommended. 22 RT/SYNC Frequency Setting (RT). Connect a resistor between RT and GND to program the switching frequency between 200 kHz to 1.8 MHz. Synchronization Input (SYNC). Connect this pin to an external clock to synchronize the switching frequency between 200 kHz and 1.8 MHz. See the Oscillator section and the Synchronization section for more information. 23 RAMP Slope Compensation Setting. Connect a resistor from RAMP to PVIN to set the slope compensation. 24 SS Soft Start Control. Connect a capacitor from SS to GND to program the soft start time. 25 EP, GND Exposed GND Pad. The exposed GND pad must be soldered to a large, external, copper GND plane to reduce thermal resistance. 26 EP, SW Exposed SW Pad. The exposed SW pad must be connected to the SW pins of the ADP2443 by using short, wide traces, or soldered to a large external SW copper plane to reduce thermal resistance. Rev. 0 | Page 7 of 24 Document Outline FEATURES APPLICATIONS TYPICAL APPLICATION CIRCUIT GENERAL DESCRIPTION REVISION HISTORY FUNCTIONAL BLOCK DIAGRAM SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION CONTROL SCHEME PRECISION ENABLE/SHUTDOWN INTERNAL REGULATOR (VREG) BOOTSTRAP CIRCUITRY OSCILLATOR SYNCHRONIZATION SOFT START POWER GOOD PEAK CURRENT-LIMIT AND SHORT-CIRCUIT PROTECTION OVERVOLTAGE PROTECTION (OVP) UNDERVOLTAGE LOCKOUT (UVLO) THERMAL SHUTDOWN APPLICATIONS INFORMATION INPUT CAPACITOR SELECTION OUTPUT VOLTAGE SETTING VOLTAGE CONVERSION LIMITATIONS INDUCTOR SELECTION OUTPUT CAPACITOR SELECTION PROGRAMMING INPUT VOLTAGE UVLO SLOPE COMPENSATION SETTING COMPENSATION DESIGN ADIsimPOWER DESIGN TOOL DESIGN EXAMPLE OUTPUT VOLTAGE SETTING FREQUENCY SETTING INDUCTOR SELECTION OUTPUT CAPACITOR SELECTION SLOPE COMPENSATION SETTING COMPENSATION COMPONENTS SOFT START TIME PROGRAM INPUT CAPACITOR SELECTION RECOMMENDED EXTERNAL COMPONENTS PRINTED CIRCUIT BOARD LAYOUT RECOMMENDATIONS TYPICAL APPLICATIONS CIRCUITS OUTLINE DIMENSIONS ORDERING GUIDE