Datasheet ADP5003 (Analog Devices)

Low Noise Micro PMU, 3 A Buck Regulator with 3 A LDO Data Sheet ADP5003 FEATURES FUNCTIONAL BLOCK DIAGRAM V Low noise, dc power supply system PVIN1: PVIN1 4.2V TO 15V High efficiency buck for first stage conversion EN1 PVIN1 High PSRR, low noise LDO regulator to remove switching VOUT1 ripple COMP1 SW1 VPVOUT1: BUCK REGULATOR SW1 0.6V TO 5.0V Adaptive LDO regulator headroom control option for 3A SW1 optimal efficiency and PSRR across full load range VSET1 PGND1 3 A, low noise, buck regulator PGND1 PGND1 Wide input voltage range: 4.2 V to 15 V VREG Programmable output voltage range: 0.6 V to 5.0 V RT 0.3 MHz to 2.5 MHz internal oscillator VPVINSYS: PVINSYS 4.2V TO 15V PWRGD 0.3 MHz to 2.5 MHz SYNC frequency range SYSTEM 3 A, low noise, NFET LDO regulator (active filter) SYNC Wide input voltage range: 0.65 V to 5 V REFOUT Programmable output voltage range: 0.6 V to 3.3 V Differential point of load remote sensing PVIN2 3 μV rms output noise (independent of output voltage) PVIN2 VSET2 PVIN2 PSRR > 50 dB (to 100 kHz) with 400 mV headroom at 3 A VBUF PVOUT2 V Ultrafast transient response LOW NOISE PVOUT2: LDO ACTIVE PVOUT2 0.6V TO 3.3V Power-good output FILTER PVOUT2 3A VREG_LDO LOAD Precision enable inputs for both the buck regulator and LDO −40°C to +125°C operating junction temperature range VFB2P EN2 32-lead, 5 mm × 5 mm, LFCSP VFB2N
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APPLICATIONS AGND1 AGND2
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Low noise power for high speed analog-to-digital converter
Figure 1.
(ADC) and digital-to-analog converter (DAC) designs Powering RF agile transceivers and clocking ICs GENERAL DESCRIPTION
The ADP5003 integrates a high voltage buck regulator and an The LDO regulator output can be accurately controlled at the ultralow noise low dropout (LDO) regulator in a small, 5 mm × point of load (POL) using remote sensing that compensates for the 5 mm, 32-lead LFCSP package to provide highly efficient and printed circuit board (PCB) trace impedance while delivering quiet regulated supplies. high output currents. The buck regulator is optimized to operate at high output Each regulator is activated via a dedicated precision enable currents up to 3 A. The LDO is capable of a maximum output input. The buck switching frequency can be synchronized to current of 3 A and operates efficiently with low headroom an external signal, or programmed with an external resistor. voltage while maintaining high power supply rejection. Safety features in the ADP5003 include thermal shutdown (TSD) The ADP5003 can operate in one of two modes. Adaptive mode and input undervoltage lockout (UVLO). The ADP5003 is rated allows the LDO to operate with a set headroom by adjusting the for a −40°C to +125°C operating junction temperature range. buck output voltage internally. Alternatively, the ADP5003 can operate in independent mode, where both regulators operate separately from each other, and where the output voltages are programmed using resistor dividers.
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Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS BUCK REGULATOR SPECIFICATIONS LDO SPECIFICATIONS ADAPTIVE HEADROOM CONTROLLER SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION POWER MANAGEMENT UNIT Adaptive Headroom Control Precision Enable/Shutdown Undervoltage Lockout (UVLO) Thermal Shutdown (TSD) Active Pull Down Soft Start (SS) Power-Good BUCK REGULATOR Control Scheme Oscillator Frequency Control External Oscillator Synchronization Buck Startup Current-Limit and Short-Circuit Protection LDO REGULATOR LDO Startup Current Limit Differential Remote Sensing POWER-GOOD OUTPUT VOLTAGE OF THE BUCK REGULATOR OUTPUT VOLTAGE OF THE LDO REGULATOR VOLTAGE CONVERSION LIMITATIONS COMPONENT SELECTION Output Capacitors Input Capacitor Inductor COMPENSATION COMPONENTS DESIGN JUNCTION TEMPERATURE BUCK REGULATOR DESIGN EXAMPLE SETTING THE SWITCHING FREQUENCY FOR THE BUCK REGULATOR SETTING THE OUTPUT VOLTAGE FOR THE BUCK REGULATOR SELECTING THE INDUCTOR FOR THE BUCK REGULATOR SELECTING THE OUTPUT CAPACITOR FOR THE BUCK REGULATOR DESIGNING THE COMPENSATION NETWORK FOR THE BUCK REGULATOR SELECTING THE INPUT CAPACITOR FOR THE BUCK REGULATOR ADAPTIVE HEADROOM CONTROL DESIGN EXAMPLE SETTING THE SWITCHING FREQUENCY FOR THE BUCK REGULATOR USING ADAPTIVE HEADROOM CONTROL SETTING THE OUTPUT VOLTAGE FOR THE BUCK REGULATOR USING ADAPTIVE HEADROOM CONTROL SELECTING THE INDUCTOR FOR THE BUCK REGULATOR USING ADAPTIVE HEADROOM CONTROL SELECTING THE OUTPUT CAPACITORS FOR THE BUCK REGULATOR USING ADAPTIVE HEADROOM CONTROL SELECTING THE INPUT CAPACITOR FOR THE BUCK REGULATOR USING ADAPTIVE HEADROOM CONTROL RECOMMENDED BUCK EXTERNAL COMPONENTS FOR THE BUCK REGULATOR BUCK CONFIGURATIONS INDEPENDENT ADAPTIVE HEADROOM LAYOUT CONSIDERATIONS OUTLINE DIMENSIONS ORDERING GUIDE