Datasheet ADE7753 (Analog Devices) - 5

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ADE7753 Parameter Spec Unit Test Conditions/Comments
Channel 2 See the Channel 2 Sampling section Signal-to-Noise Plus Distortion 60 dB typ 150 mV rms/60 Hz, gain = 2 Bandwidth (–3 dB) 140 Hz CLKIN = 3.579545 MHz REFERENCE INPUT REFIN/OUT Input Voltage Range 2.6 V max 2.4 V + 8% 2.2 V min 2.4 V – 8% Input Capacitance 10 pF max ON-CHIP REFERENCE Nominal 2.4 V at REFIN/OUT pin Reference Error ±200 mV max Current Source 10 μA max Output Impedance 3.4 kΩ min Temperature Coefficient 30 ppm/°C typ CLKIN All specifications CLKIN of 3.579545 MHz Input Clock Frequency 4 MHz max 1 MHz min LOGIC INPUTS RESET, DIN, SCLK, CLKIN, and CS Input High Voltage, VINH 2.4 V min DVDD = 5 V ± 10% Input Low Voltage, VINL 0.8 V max DVDD = 5 V ± 10% Input Current, IIN ±3 μA max Typically 10 nA, VIN = 0 V to DVDD Input Capacitance, CIN 10 pF max LOGIC OUTPUTS SAG and IRQ Open-drain outputs, 10 kΩ pull-up resistor Output High Voltage, VOH 4 V min ISOURCE = 5 mA Output Low Voltage, VOL 0.4 V max ISINK = 0.8 mA ZX and DOUT Output High Voltage, VOH 4 V min ISOURCE = 5 mA Output Low Voltage, VOL 0.4 V max ISINK = 0.8 mA CF Output High Voltage, VOH 4 V min ISOURCE = 5 mA Output Low Voltage, VOL 1 V max ISINK = 7 mA POWER SUPPLY For specified performance AVDD 4.75 V min 5 V – 5% 5.25 V max 5 V + 5% DVDD 4.75 V min 5 V – 5% 5.25 V max 5 V + 5% AIDD 3 mA max Typically 2.0 mA DIDD 4 mA max Typically 3.0 mA 1 See the Terminology section for explanation of specifications. 2 See the Analog Inputs section.
200
μ
A IOl TO OUTPUT +2.1V CL PIN 50pF 1.6mA IOH
02875-0-002 Figure 2. Load Circuit for Timing Specifications Rev. C | Page 5 of 60 Document Outline FEATURES GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS TIMING CHARACTERISTICS ABSOLUTE MAXIMUM RATINGS ESD CAUTION TERMINOLOGY PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION ANALOG INPUTS di/dt CURRENT SENSOR AND DIGITAL INTEGRATOR ZERO-CROSSING DETECTION Zero-Crossing Timeout PERIOD MEASUREMENT POWER SUPPLY MONITOR LINE VOLTAGE SAG DETECTION Sag Level Set PEAK DETECTION Peak Level Set Peak Level Record ADE7753 INTERRUPTS Using the ADE7753 Interrupts with an MCU Interrupt Timing TEMPERATURE MEASUREMENT ADE7753 ANALOG-TO-DIGITAL CONVERSION Antialias Filter ADC Transfer Function ADE7753 Reference Circuit CHANNEL 1 ADC Channel 1 Sampling Channel 1 RMS Calculation Channel 1 RMS Offset Compensation CHANNEL 2 ADC Channel 2 Sampling Channel 2 RMS Calculation Channel 2 RMS Offset Compensation PHASE COMPENSATION ACTIVE POWER CALCULATION ENERGY CALCULATION Integration Time under Steady Load POWER OFFSET CALIBRATION ENERGY-TO-FREQUENCY CONVERSION LINE CYCLE ENERGY ACCUMULATION MODE POSITIVE-ONLY ACCUMULATION MODE NO-LOAD THRESHOLD REACTIVE POWER CALCULATION SIGN OF REACTIVE POWER CALCULATION APPARENT POWER CALCULATION Apparent Power Offset Calibration APPARENT ENERGY CALCULATION Integration Times under Steady Load LINE APPARENT ENERGY ACCUMULATION ENERGIES SCALING CALIBRATING AN ENERGY METER BASED ON THE ADE7753 Watt Gain Calibrating Watt Gain Using a Reference Meter Example Calibrating Watt Gain Using an Accurate Source Example Watt Offset Calibrating Watt Offset Using a Reference Meter Example Calibrating Watt Offset with an Accurate Source Example Phase Calibration Calibrating Phase Using a Reference Meter Example Calibrating Phase with an Accurate Source Example VRMS and IRMS Calibration Apparent Energy Reactive Energy CLKIN FREQUENCY SUSPENDING ADE7753 FUNCTIONALITY CHECKSUM REGISTER ADE7753 SERIAL INTERFACE ADE7753 Serial Write Operation ADE7753 Serial Read Operation ADE7753 REGISTERS ADE7753 REGISTER DESCRIPTIONS COMMUNICATIONS REGISTER MODE REGISTER (0x09) INTERRUPT STATUS REGISTER (0x0B), RESET INTERRUPT STATUS REGISTER (0x0C), INTERRUPT ENABLE REGISTER (0x0A) CH1OS REGISTER (0x0D) OUTLINE DIMENSIONS ORDERING GUIDE