link to page 47 link to page 49 link to page 43 link to page 49 link to page 50 link to page 52 ADE7953Data SheetPin No.MnemonicDescription 20 REVP Reverse Power Output Indicator. See the Reverse Power section. This pin can be configured to output a range of alternative power quality signals (see the Alternative Output Functions section). 21 ZX_I Current Channel Zero-Crossing Output Pin. See the Current Channel Zero Crossing section. This pin can be configured to output a range of alternative power quality signals (see the Alternative Output Functions section). 22 IRQ Interrupt Output. See the ADE7953 Interrupts section. 23 CF1 Calibration Frequency Output 1. 24 CF2 Calibration Frequency Output 2. 25 SCLK Serial Clock Input for the Serial Peripheral Interface. All serial communications are synchronized to the clock (see the SPI Interface section). If using the I2C interface, this pin must be pulled high. If using the UART interface, this pin must be pulled to ground. 26 MISO/SDA/Tx Data Output for SPI Interface/Bidirectional Data Line for I2C Interface/Transmit Line for UART Interface. 27 MOSI/SCL/Rx Data Input for SPI Interface/Serial Clock Input for I2C Interface/Receive Line for UART Interface. 28 CS Chip Select for SPI Interface. This pin must be pulled high if using the I2C or UART interface. EPAD Exposed Pad. Create a similar pad on the PCB under the exposed pad. Solder the exposed pad to the pad on the PCB to confer mechanical strength to the package. Connect the pad to AGND and DGND. Rev. C | Page 10 of 72 Document Outline FEATURES GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM REVISION HISTORY SPECIFICATIONS TIMING CHARACTERISTICS SPI Interface Timing SPI Interface Timing Diagram I2C Interface Timing I2C Interface Timing Diagram ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TEST CIRCUIT TERMINOLOGY ADE7953 POWER-UP PROCEDURE REQUIRED REGISTER SETTING THEORY OF OPERATION ANALOG INPUTS Current Channel A Current Channel B Voltage Channel ANALOG-TO-DIGITAL CONVERSION Oversampling Noise Shaping Antialiasing Filter CURRENT CHANNEL ADCS di/dt Current Sensor and Digital Integrator VOLTAGE CHANNEL ADC REFERENCE CIRCUIT ROOT MEAN SQUARE MEASUREMENT CURRENT CHANNEL RMS CALCULATION VOLTAGE CHANNEL RMS CALCULATION ACTIVE POWER CALCULATION SIGN OF ACTIVE POWER CALCULATION ACTIVE ENERGY CALCULATION Active Energy Integration Time Under Steady Load Active Energy Line Cycle Accumulation Mode ACTIVE ENERGY ACCUMULATION MODES Signed Accumulation Mode Positive-Only Accumulation Mode Absolute Accumulation Mode REACTIVE POWER CALCULATION SIGN OF REACTIVE POWER CALCULATION REACTIVE ENERGY CALCULATION Reactive Energy Integration Time Under Steady Load Reactive Energy Line Cycle Accumulation Mode REACTIVE ENERGY ACCUMULATION MODES Signed Accumulation Mode Antitamper Accumulation Mode Absolute Accumulation Mode APPARENT POWER CALCULATION APPARENT ENERGY CALCULATION Apparent Energy Integration Time Under Steady Load Apparent Energy Line Cycle Accumulation Mode AMPERE-HOUR ACCUMULATION ENERGY-TO-FREQUENCY CONVERSION PULSE OUTPUT CHARACTERISTICS ENERGY CALIBRATION GAIN CALIBRATION Current Channel Gain Adjustment PHASE CALIBRATION OFFSET CALIBRATION Power Offsets RMS Offsets PERIOD MEASUREMENT INSTANTANEOUS POWERS AND WAVEFORM SAMPLING POWER FACTOR USING THE LINE CYCLE ACCUMULATION MODE TO DETERMINE THE POWER FACTOR POWER FACTOR WITH NO-LOAD DETECTION ANGLE MEASUREMENT NO-LOAD DETECTION SETTING THE NO-LOAD THRESHOLDS ACTIVE ENERGY NO-LOAD DETECTION Active Energy No-Load Interrupt Active Energy No-Load Status Bits REACTIVE ENERGY NO-LOAD DETECTION Reactive Energy No-Load Interrupt Reactive Energy No-Load Status Bits APPARENT ENERGY NO-LOAD DETECTION Apparent Energy No-Load Interrupt Apparent Energy No-Load Status Bits ZERO-CROSSING DETECTION ZERO-CROSSING OUTPUT PINS Voltage Channel Zero Crossing Current Channel Zero Crossing ZERO-CROSSING INTERRUPTS ZERO-CROSSING TIMEOUT ZERO-CROSSING THRESHOLD VOLTAGE SAG DETECTION SETTING THE SAGCYC REGISTER SETTING THE SAGLVL REGISTER VOLTAGE SAG INTERRUPT PEAK DETECTION INDICATION OF POWER DIRECTION REVERSE POWER SIGN INDICATION OVERCURRENT AND OVERVOLTAGE DETECTION SETTING THE OVLVL AND OILVL REGISTERS OVERVOLTAGE AND OVERCURRENT INTERRUPTS ALTERNATIVE OUTPUT FUNCTIONS ADE7953 INTERRUPTS PRIMARY INTERRUPTS (VOLTAGE CHANNEL AND CURRENT CHANNEL A) CURRENT CHANNEL B INTERRUPTS COMMUNICATING WITH THE ADE7953 COMMUNICATION AUTODETECTION LOCKING THE COMMUNICATION INTERFACE SPI INTERFACE I2C INTERFACE I2C Write Operations I2C Read Operations UART INTERFACE UART Read UART Write COMMUNICATION VERIFICATION AND SECURITY WRITE PROTECTION COMMUNICATION VERIFICATION CHECKSUM REGISTER ADE7953 REGISTERS ADE7953 REGISTER DESCRIPTIONS Interrupt Enable and Interrupt Status Registers Current Channel A and Voltage Channel Registers Current Channel B Registers LAYOUT GUIDELINES OUTLINE DIMENSIONS ORDERING GUIDE