Datasheet ADE7953 (Analog Devices) - 3

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Data Sheet ADE7953
Write Protection .. 57  ADE7953 Register Descriptions ... 62  Communication Verification ... 57  Layout Guidelines ... 68  Checksum Register ... 58  Outline Dimensions .. 69  ADE7953 Registers ... 60  Ordering Guide ... 69 
REVISION HISTORY 12/2016—Rev. B to Rev. C
Changes to Table 15 .. 61 Changed CP-28-6 to CP-28-10 .. Throughout Changes to Table 18 .. 62 Changes to Figure 4 ... 9 Added Layout Guidelines Section ... 68 Changes to Period Measurement Section .. 36 Updated Outline Dimensions .. 69 Updated Outline Dimensions .. 69 Changes to Ordering Guide ... 69
11/2011—Rev. 0 to Rev. A
Changes to Figure 1 .. 1
11/2013—Rev. A to Rev. B
Changes to Table 1 .. 3 Changes to Features Section .. 1 Changes to Absolute Maximum Ratings Section ... 8 Changed Input Clock Frequency from 3.58 MHz (Max) to Changes to Table 5 .. 9 3.54 MHz (Min)/3.58 MHz (Typ)/3.62 MHz (Max) .. 5 Replaced Typical Performance Characteristics Section ... 11 Changed tDAV from 80 ns (Min) to 80 ns (Max) .. 6 Changes to Figure 35 .. 16 Changed tHD;DAT (Min) from 0 μs to 0.1 μs ... 7 Added ADE7953 Power-Up Procedure Section ... 18 Changes to EPAD Note... 9 Changes to Voltage Channel Section .. 19 Changes to Figure 35 .. 16 Changes to Current Channel RMS Calculation Section and Changes to Current Channel ADCs Section and Voltage Voltage Channel RMS Calculation Section ... 23 Channel ADC Section .. 21 Changes to Active Power Calculation Section .. 24 Changes to Figure 45 .. 24 Changes to Active Energy Integration Time Under Steady Changes to Figure 46 .. 25 Load Section .. 25 Changes to Current Channel Gain Adjustment Section .. 34 Changes to Reactive Power Calculation Section .. 28 Changes to RMS Offsets Section ... 35 Changes to Reactive Energy Integration Time Under Steady Changes to Equation 37 .. 38 Load Section .. 29 Changes to First Paragraph in No-Load Detection Section .. 40 Changes to Figure 65 .. 47 Changes to Communication Autodetection Section and Changes to Write Protection Section ... 57 Locking the Communication Interface Section .. 51 Replaced Checksum Register Section and added Figure 75 and Changes to I2C Interface Section ... 53 Figure 76 ... 58 Changes to Write Protection Section .. 57 Changes to Table 12 .. 59 Changes to Figure 76 .. 58 Changes to Table 14 .. 60 Changes to Table 12 .. 59 Changes to Table 15 .. 61 Changes to Table 13 and Table 14 ... 60 Replaced Interrupt Enable Section and Interrupt Status Registers Section ... 66
2/2011—Revision 0: Initial Version
Rev. C | Page 3 of 72 Document Outline FEATURES GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM REVISION HISTORY SPECIFICATIONS TIMING CHARACTERISTICS SPI Interface Timing SPI Interface Timing Diagram I2C Interface Timing I2C Interface Timing Diagram ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TEST CIRCUIT TERMINOLOGY ADE7953 POWER-UP PROCEDURE REQUIRED REGISTER SETTING THEORY OF OPERATION ANALOG INPUTS Current Channel A Current Channel B Voltage Channel ANALOG-TO-DIGITAL CONVERSION Oversampling Noise Shaping Antialiasing Filter CURRENT CHANNEL ADCS di/dt Current Sensor and Digital Integrator VOLTAGE CHANNEL ADC REFERENCE CIRCUIT ROOT MEAN SQUARE MEASUREMENT CURRENT CHANNEL RMS CALCULATION VOLTAGE CHANNEL RMS CALCULATION ACTIVE POWER CALCULATION SIGN OF ACTIVE POWER CALCULATION ACTIVE ENERGY CALCULATION Active Energy Integration Time Under Steady Load Active Energy Line Cycle Accumulation Mode ACTIVE ENERGY ACCUMULATION MODES Signed Accumulation Mode Positive-Only Accumulation Mode Absolute Accumulation Mode REACTIVE POWER CALCULATION SIGN OF REACTIVE POWER CALCULATION REACTIVE ENERGY CALCULATION Reactive Energy Integration Time Under Steady Load Reactive Energy Line Cycle Accumulation Mode REACTIVE ENERGY ACCUMULATION MODES Signed Accumulation Mode Antitamper Accumulation Mode Absolute Accumulation Mode APPARENT POWER CALCULATION APPARENT ENERGY CALCULATION Apparent Energy Integration Time Under Steady Load Apparent Energy Line Cycle Accumulation Mode AMPERE-HOUR ACCUMULATION ENERGY-TO-FREQUENCY CONVERSION PULSE OUTPUT CHARACTERISTICS ENERGY CALIBRATION GAIN CALIBRATION Current Channel Gain Adjustment PHASE CALIBRATION OFFSET CALIBRATION Power Offsets RMS Offsets PERIOD MEASUREMENT INSTANTANEOUS POWERS AND WAVEFORM SAMPLING POWER FACTOR USING THE LINE CYCLE ACCUMULATION MODE TO DETERMINE THE POWER FACTOR POWER FACTOR WITH NO-LOAD DETECTION ANGLE MEASUREMENT NO-LOAD DETECTION SETTING THE NO-LOAD THRESHOLDS ACTIVE ENERGY NO-LOAD DETECTION Active Energy No-Load Interrupt Active Energy No-Load Status Bits REACTIVE ENERGY NO-LOAD DETECTION Reactive Energy No-Load Interrupt Reactive Energy No-Load Status Bits APPARENT ENERGY NO-LOAD DETECTION Apparent Energy No-Load Interrupt Apparent Energy No-Load Status Bits ZERO-CROSSING DETECTION ZERO-CROSSING OUTPUT PINS Voltage Channel Zero Crossing Current Channel Zero Crossing ZERO-CROSSING INTERRUPTS ZERO-CROSSING TIMEOUT ZERO-CROSSING THRESHOLD VOLTAGE SAG DETECTION SETTING THE SAGCYC REGISTER SETTING THE SAGLVL REGISTER VOLTAGE SAG INTERRUPT PEAK DETECTION INDICATION OF POWER DIRECTION REVERSE POWER SIGN INDICATION OVERCURRENT AND OVERVOLTAGE DETECTION SETTING THE OVLVL AND OILVL REGISTERS OVERVOLTAGE AND OVERCURRENT INTERRUPTS ALTERNATIVE OUTPUT FUNCTIONS ADE7953 INTERRUPTS PRIMARY INTERRUPTS (VOLTAGE CHANNEL AND CURRENT CHANNEL A) CURRENT CHANNEL B INTERRUPTS COMMUNICATING WITH THE ADE7953 COMMUNICATION AUTODETECTION LOCKING THE COMMUNICATION INTERFACE SPI INTERFACE I2C INTERFACE I2C Write Operations I2C Read Operations UART INTERFACE UART Read UART Write COMMUNICATION VERIFICATION AND SECURITY WRITE PROTECTION COMMUNICATION VERIFICATION CHECKSUM REGISTER ADE7953 REGISTERS ADE7953 REGISTER DESCRIPTIONS Interrupt Enable and Interrupt Status Registers Current Channel A and Voltage Channel Registers Current Channel B Registers LAYOUT GUIDELINES OUTLINE DIMENSIONS ORDERING GUIDE