Datasheet ADE9078 (Analog Devices)

FabricanteAnalog Devices
DescripciónHigh Performance, Polyphase Energy Metering AFE
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High Performance, Polyphase. Energy Metering AFE. Data Sheet. ADE9078. FEATURES. FUNCTIONAL BLOCK DIAGRAM

Datasheet ADE9078 Analog Devices

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High Performance, Polyphase Energy Metering AFE Data Sheet ADE9078 FEATURES FUNCTIONAL BLOCK DIAGRAM 7 high performance analog-to-digital converters (ADCs) LDO ADE9078 101 dB signal-to-noise ratio (SNR) 10,000:1 dynamic range PGA ADC METROLOGY FEATURES Wide input range: ±1 V, 0.707 V rms full scale PGA ADC CF1 Differential inputs (PER PHASE) TO CF4 IRMS, VRMS ±25 ppm/°C maximum channel temperature drift (including PGA ADC ACTIVE POWER, VA SINC4 WATTHOUR, VA-Hr ADC, internal V AND IRQ0 REF, and PGA drift) enabling Class 0.2 PGA ADC DECIMATION WAVEFORM BUFFER IRQ1 meters with standard external components LINE FREQUENCY ETC. PGA Power quality measurements ADC SPI Line frequency: 1 measurement per phase PGA ADC Zero crossing detection, zero-crossing timeout PGA ADC Phase angle measurements 1.25V
001
Supports current transformers (CTs) and Rogowski coil REFERENCE
14331-
(di/dt) sensors
Figure 1.
Multiple range phase/gain compensation for CTs Digital integrator for Rogowski coils Flexible waveform buffer Able to resample waveform to ensure 64 points per line cycle for ease of external harmonic analysis Events can trigger waveform storage Simplifies data collection for IEC 61000-4-7 harmonic analysis Advanced metrology feature set Total active power, volt-amperes reactive (VAR), volt- amperes (VA), watthour, VAR-hour, and VA-hour Fundamental VAR and VAR-hour
The ADE9078 integrates seven high performances ADCs and a
Current and voltage rms per phase (xIRMS, xVRMS)
flexible DSP core. An integrated high end reference ensures low
Supports active energy standards: IEC 62053-21,
drift over temperature with a combined drift of less than
IEC 62053-22; EN50470-3; OIML R46, ANSI C12.20
±25 ppm/°C maximum per channel, each of which includes a
Supports reactive energy standards: IEC 62053-23,
programmable gain amplifier (PGA) and ADC.
IEC 62053-4
The ADE9078 offers an integrated flexible waveform buffer that
High speed communication port
stores samples at a fixed data rate or a sampling rate that varies
10 MHz serial peripheral interface (SPI)
based on line frequency to ensure 64 points per line cycle. These
APPLICATIONS
two options make it easy to implement harmonic analysis in an
Polyphase meters
external processor according to IEC 61000-4-7.
Power quality monitoring
Two power modes are provided to enable detection of meter
Protective device
tampering: PSM2 uses a low power comparator to compare
GENERAL DESCRIPTION
current channels to a threshold and indicates whether it is exceeded on the IRQ0 and IRQ1 outputs; PSM1 enables fast The ADE90781 is a highly accurate, fully integrated energy measurement of current and voltage rms (xVRMS and xIRMS), metering device. Interfacing with both current transformer active power, and VAR during a tamper. (CT) and Rogowski coil sensors, the ADE9078 enables users to develop a 3-phase metrology platform, which achieves high The ADE9078 al ows advanced and highly accurate energy performance for Class 1 up to Class 0.2 meters. measurements, enabling one platform to cover a wide range of meters, through a combination of various high end metrology features and superior analog performance. 1 Protected by U.S. Patents 5,952,849; 6,873,065; 7,075,329; 6,262,600; 7,489,526; 7,558,080. Other patents are pending.
Rev. 0 Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 ©2016 Analog Devices, Inc. All rights reserved. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. Technical Support www.analog.com
Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS TIMING CHARACTERISTICS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TOTAL ENERGY LINEARITY OVER SUPPLY AND TEMPERATURE FUNDAMENTAL ENERGY LINEARITY WITH FIFTH HARMONIC OVER SUPPLY AND TEMPERATURE TOTAL ENERGY ERROR OVER FREQUENCY RMS LINEARITY OVER TEMPERATURE AND RMS ERROR OVER FREQUENCY ENERGY LINEARITY REPEATABILITY TOTAL ENERGY AND RMS LINEARITY WITH INTEGRATOR ON TOTAL ENERGY ERROR OVER FREQUENCY WITH INTEGRATOR ON TEST CIRCUIT TERMINOLOGY THEORY OF OPERATION ADC Overview Analog Input Configuration Fully Differential Inputs Interfacing to Current and Voltage Sensors Internal RF Immunity Filter Modes of Operation Output Data Rates and Format Voltage Reference CRYSTAL OSCILLATOR/EXTERNAL CLOCK Crystal Selection Load Capacitor Calculation Load Capacitor Calculation Example POWER MANAGEMENT Power Modes Power-On Sequence Brownout Detection Reset Changing to PSM2 or PSM3 MEASUREMENTS (NORMAL MODE) Current Channel Current Channel Measurement Update Rates ADC_REDIRECT Multiplexer Current Channel Gain, xIGAIN IB Calculation Using ICONSEL High-Pass Filter Digital Integrator Phase Compensation Multipoint Gain and Phase Calibration Multipoint Gain and Phase Single-Point Gain and Phase Voltage Channel Voltage Channel Measurements Voltage Channel Gain Energy Measurements Overview Per Phase Energy Measurements Update Rate Power-Based and Filter-Based RMS Measurement Algorithms Filter-Based Total RMS Neutral Current RMS, RMS of Sum of Instantaneous Currents Total Active Power Total Reactive Power Total Apparent Power Fundamental Reactive Power Power Factor Energy Accumulation Signed Energy Accumulation Modes Total Active Energy Accumulation Modes Reactive Energy Accumulation Modes No Load Detection No Load Indications Energy Accumulation Details Internal Energy Register Overflow Rate User Energy Register Update Rate, EGYRDY Reloading or Accumulating User Energy Register User Energy Register Overflow Rate Accessing the User Energy Registers Read User Energy Register with Reset User Energy Register Use Models Digital to Frequency Conversion—CFx Output Energy and Phase Selection Configuring the Maximum CF Pulse Output Frequency Configuring the CF Pulse Width CFx Pulse Sign Clearing the CFx Accumulator Disabling the CFx Pulse Output and CFx Interrupt MEASUREMENTS (PSM1) Overview IRMS, VRMS, and Active Power VAR PSM1 Startup Flow from PSM2 and PSM3 PSM1 Startup Flow from PSM0 Power Accumulation Power Accumulation Details Accessing the User Power Registers Power Sign Detection Zero-Crossing Detection Combined Voltage Zero Crossing Zero-Crossing Output Rates Zero-Crossing Timeout Line Period Calculation Angle Measurement Phase Sequence Error Detection 4-Wire Wye and 4-Wire Delta 3-Wire Delta Peak Detection MEASUREMENTS (PSM2) Overview Low Power Comparator KEY FEATURES FLEXIBLE WAVEFORM BUFFER WITH RESAMPLING MULTIPOINT PHASE/GAIN CALIBRATION RMS OF SUM OF INSTANTANEOUS CURRENTS MEASUREMENT TAMPER MODES POWER FACTOR ZERO-CROSSING TIMEOUT DETECTION LINE PERIOD MEASUREMENT ANGLE MEASUREMENT PHASE SEQUENCE ERROR DETECTION QUICK START APPLICATIONS INFORMATION NON-BLONDEL COMPLIANT METERS APPLYING THE ADE9078 TO A 4-WIRE WYE SERVICE APPLYING THE ADE9078 TO A 3-WIRE DELTA SERVICE APPLYING THE ADE9078 TO A NON-BLONDEL COMPLIANT, 4-WIRE WYE SERVICE APPLYING THE ADE9078 TO A NON-BLONDEL COMPLIANT, 4-WIRE DELTA SERVICE SERVICE TYPE SUMMARY ACCESSING ON-CHIP DATA SPI PROTOCOL OVERVIEW SPI WRITE SPI READ SPI BURST READ SPI PROTOCOL CRC CRC Algorithm ADDITIONAL COMMUNICATION VERIFICATION REGISTERS CRC OF CONFIGURATION REGISTERS CONFIGURATION LOCK WAVEFORM BUFFER FIXED DATA RATE WAVEFORMS Waveform Buffer Filling Indication—Fixed Data Rate Samples FIXED DATA RATE WAVEFORMS FILLING AND TRIGGER-BASED MODES Stop When Buffer Is Full Mode Continuous Fill Mode Stop Filling on Trigger Center Capture Around Trigger Save Event Address and Keep Filling RESAMPLED WAVEFORMS CONFIGURING THE WAVEFORM BUFFER BURST READ WAVEFORM BUFFER SAMPLES FROM SPI Example 1: Fixed Data Rate Data, Seven Channel Samples Example 2: Resampled Data, Phase C (I and V Samples) Example 3: Fixed Data Rate Data, Single Address Read Mode Example 4: Resampled Data, Single Address Read Mode SPI CRC when Reading the Waveform Buffer SPI Last Data Register when Reading the Waveform Buffer INTERRUPTS/EVENTS INTERRUPTS (IRQ0\ AND IRQ1\) EVENT\ STATUS BITS IN ADDITIONAL REGISTERS No Load TROUBLESHOOTING SPI DOES NOT WORK PSM2_CFG REGISTER VALUE IS NOT RETAINED WHEN GOING FROM PSM2 OR PSM3 TO PSM0 REGISTER INFORMATION REGISTER DETAILS OUTLINE DIMENSIONS ORDERING GUIDE