Datasheet LTM4615 (Analog Devices) - 10

LTM4615
operaTion LTM4615 POWER MODULE DESCRIPTION
The LTM4615 is internally compensated to be stable over the operating conditions. Table 4 provides a guideline
Dual Switching Regulator Section
for input and output capacitance for several operating The LTM4615 is a standalone dual nonisolated switching conditions. The LTpowerCAD™ Design Tool is provided mode DC/DC power supply with an additional onboard for transient and stability analysis. 1.5A VLDO. It can deliver up to 4A of DC output current The FB pins are used to program the specific output volt- for each channel with few external input and output ca- age with a single resistor to ground. pacitors. This module provides two precisely regulated output voltages programmable via one external resistor
VLDO Section
for each channel from 0.8V DC to 5V DC over a 2.375V The VLDO (very low dropout) linear regulator operates to 5.5V input voltage range. The VLDO is an independent from a 1.14V to 3.5V input. The VLDO uses an internal 1.5A linear regulator that can be powered from either NMOS transistor as the pass device in a source-follower switching converter. The typical application schematic is configuration. The BOOST3 pin is the output of an inter- shown in Figure 12. nal boost converter that supplies the higher supply drive The LTM4615 has two integrated constant frequency cur- to the pass device for low dropout enhancement. The rent mode regulators, with built-in power MOSFETs with internal boost converter operates on very low current, fast switching speed. The typical switching frequency is thus optimizing high efficiency for the VLDO in close to 1.25MHz. With current mode control and internal feedback dropout operation. loop compensation, these switching regulators have suf- An undervoltage lockout comparator on the LDO ensures ficient stability margins and good transient performance that the boost voltage is greater than 4.2V before enabling under a wide range of operating conditions, and with a the LDO, otherwise the LDO is disabled. wide range of output capacitors, even all ceramic output capacitors. The LDO provides a high accuracy output capable of supply 1.5A of output current with a typical drop out of 100mV. Current mode control provides cycle-by-cycle fast current A single ceramic 10µF capacitor is all that is required limit. Besides, current limiting is provided in an overcur- for output capacitor bypassing. A low reference voltage rent condition with thermal shutdown. In addition, internal allows the VLDO to have lower output voltages than the overvoltage and undervoltage comparators pull the open- commonly available LDO. drain PGOOD outputs low if the particular output feedback voltage exits a ±7.5% window around the regulation point. The device also includes current limit and thermal over- Furthermore, in an overvoltage condition, internal top FET, load protection. The NMOS follower architecture has fast M1, is turned off and bottom FET, M2, is turned on and transient response without the traditional high drive cur- held on until the overvoltage condition clears, or current rents in dropout. The VLDO includes a soft-start feature limit is exceeded. to prevent excessive current on the input during start-up. When the VLDO is enabled, the soft-start circuitry gradu- Pulling each specific RUN/SS pin below 0.8V forces the ally increases the reference voltage from 0V to 0.4V over specific regulator controller into its shutdown state, turn- a period of approximately 200µs. ing off both M1 and M2 for each power stage. At low load current, each regulator works in continuous current mode by default to achieve minimum output voltage ripple. The TRACK pins are used for power supply tracking for each specific regulator. See the Applications Information section. 4615fb 10 For more information www.linear.com/LTM4615 Document Outline Features Description Applications Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Simplified Block Diagram Decoupling Requirements Operation Applications Information Package Description Revision History Package Photograph Related Parts