Datasheet LTM4615 (Analog Devices) - 8

LTM4615
pin FuncTions VIN1, VIN2 (J1-J5, K1-K5); (C1-C6, D1-D5):
Power Input
COMP1, COMP2 (L5, E5):
Current Control Threshold Pins. Apply input voltage between these pins and GND and Error Amplifier Compensation Point. The current pins. Recommend placing input decoupling capacitance comparator threshold increases with this control voltage. directly between VIN pins and GND pins. Two power modules can current share when this pin is
V
connected in parallel with the adjacent module’s COMP
OUT1, VOUT2 (K9-K12, L9-L12, M9-M12); (C9-C12, D9-D12, E11-E12):
Power Output Pins. Apply output load pin. Each channel has been internally compensated. See between these pins and GND pins. Recommend placing the Applications Information section. output decoupling capacitance directly between these pins
PGOOD1, PGOOD2 (L4, E4):
Output Voltage Power and GND pins. Review Table 4. Good Indicator. Open-drain logic output that is pulled to
GND1, GND2, (H1, H7-H12, J6-J12, K6-K8 L1, L7-L8,
ground when the output voltage is not within ±7.5% of
M1-M8); (A1-A12, B1, B7-B12, C7-C8, D6-D8, E1,
the regulation point.
E8-E10):
Power Ground Pins for Both Input and Output
RUN/SS1, RUN/SS2 (L2, E2):
Run Control and Soft-Start Returns. Pin. A voltage above 0.8V will turn on the module, and
TRACK1, TRACK2 (L3, E3):
Output Voltage Tracking Pins. below 0.5V will turn off the module. This pin has a 1M When the module is configured as a master output, then a resistor to VIN and a 1000pF capacitor to GND. See the soft-start capacitor is placed on the RUN/SS pin to ground Applications Information section for soft-start information. to control the master ramp rate, or an external ramp can
SW1, SW2 (H2-H6, B2-B6):
The switching node of the be applied to the master regulator’s track pin to control it. circuit is used for testing purposes. This can be connected Slave operation is performed by putting a resistor divider to copper on the board for improved thermal performance. from the master output to ground, and connecting the SW1 and SW2 must be floating on separate copper planes. center point of the divider to this pin on the slave regulator.
LDO_IN (G1-G4):
VLDO Input Power Pins. Place input If tracking is not desired, then connect the TRACK pin to capacitor close to these pins. VIN. Load current must be present for tracking. See the Applications Information section.
LDO_OUT (G9-G12):
VLDO Output Power Pins. Place output capacitor close to these pins. Minimum 1mA load
FB1, FB2 (L6, E6):
The Negative Input of the Switching is necessary for proper output voltage accuracy. Regulators’ Error Amplifier. Internally, these pins are con- nected to VOUT with a 4.99k precision resistor. Different
BOOST3 (E7):
Boost Supply for Driving the Internal VLDO output voltages can be programmed with an additional NMOS Into Full Enhancement. The pin is use for testing resistor between the FB and GND pins. Two power modules the internal boost converter. The output is typically 5V. can current share when this pin is connected in parallel
GND3 (F1-F5, F7, F9-F12, G6-G8):
The power ground pins with the adjacent module’s FB pin. See the Applications for both input and output returns for the internal VLDO. Information section.
PGOOD3 (G5):
VLDO Power Good Pin.
FB3 (F6):
The Negative Input of the LDO Error Amplifier. Internally the pin is connected to LDO_OUT with a 4.99k
EN3 (F8):
VLDO Enable Pin. resistor. Different output voltages can be programmed with an additional resistor between the FB3 and GND pins. See the Applications Information section. 4615fb 8 For more information www.linear.com/LTM4615 Document Outline Features Description Applications Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Simplified Block Diagram Decoupling Requirements Operation Applications Information Package Description Revision History Package Photograph Related Parts