Datasheet PCF8574, PCF8574A (NXP) - 8
Fabricante | NXP |
Descripción | Remote 8-bit I/O expander for I2C-bus with interrupt |
Páginas / Página | 33 / 8 — NXP Semiconductors. PCF8574; PCF8574A. Remote 8-bit I/O expander for … |
Revisión | 5.0 |
Formato / tamaño de archivo | PDF / 814 Kb |
Idioma del documento | Inglés |
NXP Semiconductors. PCF8574; PCF8574A. Remote 8-bit I/O expander for I2C-bus with interrupt
Línea de modelo para esta hoja de datos
- PCF8574T PCF8574T,112 PCF8574T,118 PCF8574T/3,112 PCF8574T/3,118 PCF8574T/3,512 PCF8574T/3,518 PCF8574TS PCF8574TS/3,112 PCF8574TS/3,118 PCF8574TS/F3,112 PCF8574TS/F3,118 PCF8574TS/F3,512 PCF8574TS/F3,518
Versión de texto del documento
NXP Semiconductors PCF8574; PCF8574A Remote 8-bit I/O expander for I2C-bus with interrupt 8.2 Writing to the port (Output mode)
The master (microcontroller) sends the START condition and slave address setting the last bit of the address byte to logic 0 for the write mode. The PCF8574/74A acknowledges and the master then sends the data byte for P7 to P0 to the port register. As the clock line goes HIGH, the 8-bit data is presented on the port lines after it has been acknowledged by the PCF8574/74A. If a LOW is written, the strong pull-down turns on and stays on. If a HIGH is written, the strong pull-up turns on for 1⁄2 of the clock cycle, then the line is held HIGH by the weak current source. The master can then send a STOP or ReSTART condition or continue sending data. The number of data bytes that can be sent successively is not limited and the previous data is overwritten every time a data byte has been sent and acknowledged. Ensure a logic 1 is written for any port that is being used as an input to ensure the strong external pull-down is turned off. SCL 1 2 3 4 5 6 7 8 9 slave address data 1 data 2 SDA S A6 A5 A4 A3 A2 A1 A0 0 A P7 P6 1 P4 P3 P2 P1 P0 A P7 P6 0 P4 P3 P2 P1 P0 A START condition R/W P5 P5 acknowledge acknowledge acknowledge from slave from slave from slave write to port t t v(Q) v(Q) data output from port DATA 1 VALID DATA 2 VALID P5 output voltage Itrt(pu) P5 pull-up output current IOH INT td(rst) 002aah349
Fig 8. Write mode (output)
Simple code WRITE mode: <S> <slave address + write> <
ACK
> <data out> <
ACK
> <data out> <
ACK
> ... <data out> <
ACK
> <P>
Remark:
Bold type = generated by slave device. PCF8574_PCF8574A All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 5 — 27 May 2013 8 of 33
Document Outline 1. General description 2. Features and benefits 3. Applications 4. Ordering information 4.1 Ordering options 5. Block diagram 6. Pinning information 6.1 Pinning 6.2 Pin description 7. Functional description 7.1 Device address 7.1.1 Address maps 8. I/O programming 8.1 Quasi-bidirectional I/Os 8.2 Writing to the port (Output mode) 8.3 Reading from a port (Input mode) 8.4 Power-on reset 8.5 Interrupt output (INT) 9. Characteristics of the I2C-bus 9.1 Bit transfer 9.1.1 START and STOP conditions 9.2 System configuration 9.3 Acknowledge 10. Application design-in information 10.1 Bidirectional I/O expander applications 10.2 How to read and write to I/O expander (example) 10.3 High current-drive load applications 10.4 Migration path 11. Limiting values 12. Thermal characteristics 13. Static characteristics 14. Dynamic characteristics 15. Package outline 16. Handling information 17. Soldering of SMD packages 17.1 Introduction to soldering 17.2 Wave and reflow soldering 17.3 Wave soldering 17.4 Reflow soldering 18. Soldering of through-hole mount packages 18.1 Introduction to soldering through-hole mount packages 18.2 Soldering by dipping or by solder wave 18.3 Manual soldering 18.4 Package related soldering information 19. Soldering: PCB footprints 20. Abbreviations 21. Revision history 22. Legal information 22.1 Data sheet status 22.2 Definitions 22.3 Disclaimers 22.4 Trademarks 23. Contact information 24. Contents