LT1737 UUUPI FU CTIO SPGND (Pin 1): The power ground pin carries the GATE 3VOUT (Pin 9): Output pin for nominal 3V reference. This node discharge current. This is typically a current spike of facilitates various user applications. This node is internally several hundred mA with a duration of tens of nanosec- current limited for protection and is intended to drive onds. It should be connected directly to a good quality either moderate capacitive loads of several hundred pF or ground plane. less, or, very large capacitive loads of 0.1µF or more. See Applications Information for more details. ISENSE (Pin 2): Pin to measure switch current with external sense resistor. The sense resistor should be of a nonin- UVLO (Pin 10): This is a dual function pin that implements ductive construction as high speed performance is essen- both undervoltage lockout and shutdown functions. Pull- tial. Proper grounding technique is also required to avoid ing this pin to near ground effects shutdown and reduces distortion of the high speed current waveform. A preset quiescent current to tens of microamperes. internal limit of nominally 250mV at this pin effects a Additionally, an external resistor divider between V switch current limit. IN and ground may be connected to this pin to implement an SFST (Pin 3): Pin for optional external capacitor to effect undervoltage lockout function. The bias current on this pin soft-start function. See Applications Information for is a function of the state of the UVLO comparator; as the details. threshold is exceeded, the bias current increases. This creates a hysteresis band equal to the change in bias ROCMP (Pin 4): Input pin for optional external load com- current times the Thevenin impedance of the user’s resis- pensation resistor. Use of this pin allows nominal com- tive divider. The user may thereby adjust the impedance of pensation for nonzero output impedance in the power the UVLO divider to achieve a desired degree of hysteresis. transformer secondary circuit, including secondary wind- A 100pF capacitor to ground is recommended on this pin. ing impedance, output Schottky diode impedance and See Application Information for details. output capacitor ESR. In less demanding applications, this resistor is not needed. See Applications Information for SGND (Pin 11): The signal ground pin is a clean ground. more details. The internal reference, oscillator and feedback amplifier are referred to it. Keep the ground path connection to the RCMPC (Pin 5): Pin for external filter capacitor for optional FB pin, OSCAP capacitor and the V load compensation function. A common 0.1µF ceramic C compensation capaci- tor free of large ground currents. capacitor will suffice for most applications. See Applica- tions Information for further details. MINENAB (Pin 12): Pin for external programming resistor to set minimum enable time. See Applications Information OSCAP (Pin 6): Pin for external timing capacitor to set for details. oscillator switching frequency. See Applications Informa- tion for details. ENDLY (Pin 13): Pin for external programming resistor to set enable delay time. See Applications Information for VC (pin 7): This is the control voltage pin which is the details. output of the feedback amplifier and the input of the current comparator. Frequency compensation of the tON (Pin 14): Pin for external programming resistor to set overall loop is effected in most cases by placing a switch minimum on time. See Applications Information capacitor between this node and ground. for details. FB (Pin 8): Input pin for external “feedback” resistor VCC (Pin 15): Supply voltage for the LT1737. Bypass this divider. The ratio of this divider, times the internal band- pin to ground with 1µF or more. gap (VBG) reference, times the effective transformer turns GATE (Pin 16): This is the gate drive to the external power ratio is the primary determinant of the output voltage. The MOSFET switch and has large dynamic currents flowing Thevenin equivalent resistance of the feedback divider through it. Keep the trace to the MOSFET as short as should be roughly 3k. See Applications Information for possible to minimize electromagnetic radiation and volt- more details. age spikes. A series resistance of 5Ω or more may help to dampen ringing in less than ideal layouts. 1737fa 6