Datasheet LT3781 (Analog Devices) - 7

LT3781
U U U PI FU CTIO S
The LT3781 oscillator operates by monitoring the voltage
SS (Pin 8):
Soft-Start. Connect a capacitor (CSS) from this on CFSET as it is charged via RFSET. When the voltage on the pin to ground. FSET pin reaches 2.5V, the oscillator rapidly discharges The output voltage of the LT3781 error amplifier corre- the capacitor with an average current of about 0.8mA. sponds to the peak current sense amplifier output de- Once the voltage on the pin is reduced to 1.5V, the pin tected before resetting the switch outputs. The soft-start becomes high-impedance and the charging cycle repeats. circuit forces the error amplifier output to a zero sense The oscillator operates at twice the switching frequency of current for start-up. A 10µA current is forced from this pin the controller. onto an external capacitor. As the SS pin voltage ramps up, Oscillator frequency fOSC can be approximated by the so does the LT3781 internally sensed current limit. This relation: effectively forces the internal current limit to ramp from zero, allowing overall converter current to slowly increase   – –  1  1  until normal output regulation is achieved. This function R –  2 6 –4   f ≅ 0 5 . •10 + C FSET  8 •10  OSC FSET + +  reduces output overshoot on converter start-up. The soft-  3  RFSET     start functions incorporate a 1VBE “dead zone” such that a zero-current condition is maintained on the VC pin until
SYNC (Pin 7):
Oscillator Synchronization Input Pin with the SS pin rises to 1VBE above ground. TTL-Level Compatible Input. The SYNC input signal (at the desired synchronized operating frequency) controls both The SS pin voltage is reset to start-up condition during the internal oscillator (running at twice the SYNC fre- shutdown, undervoltage lockout, and overvoltage or quency) and the output switch phase. If synchronization overcurrent events, yielding a graceful converter output function is not desired, this pin may be floated or shorted recovery from these events. to ground.
VFB (Pin 9):
Error Amplifier Inverting Input. Typically The LT3781 internal oscillator drives a toggle flip-flop that connected to a resistor divider from the output and com- assures a ≤50% duty-cycle condition during oscillator pensation components to the VC pin. free-run. The oscillator, therefore, runs at twice the oper- The VFB pin is the converter output voltage feedback node. ating frequency of the controller. The SYNC input decoder Input bias current of ~50nA forces pin high in the event of incorporates a frequency doubling circuit for oscillator an open feedback path condition. The error amplifier is synchronization, resetting the internal oscillator on both internally referenced to 1.25V. the rising and falling edges of the input signal. Values for the VOUT to VFB feedback resistor (RFB1) and The SYNC input decoder also differentiates transition the VFB to ground resistor (RFB2) can be calculated to phase and forces the toggle flip-flop to phase-lock with the program converter output voltage (VOUT) via the following SYNC input. A transition to logic high on the SYNC input relation: signal corresponds to the initiation of a new switching cycle (primary switches turning on pending current con- VOUT = 1.25 • (RFB1 + RFB2)/RFB2 trol) and a transition to logic low forces a primary switch
VC (Pin 10):
Error Amplifier Output. The LT3781 error off state. As such, the maximum operating duty cycle is amplifier is a low impedance output inverting gain stage. equal to the duty cycle of the SYNC signal. The SYNC input The amplifier has ample current source capability to allow can therefore be used to reduce the maximum duty cycle easy integration of isolation optocouplers that require bias of the controller by reducing the duty cycle of the SYNC currents up to 10mA. External DC loading of the VC pin input. reduces the external current sourcing capacity of the 5VREF pin by the same amount as the load on the VC pin. 3781f 7