LT3751 ELECTRICAL CHARACTERISTICSThe l denotes the specifications which apply over the full operatingtemperature range, otherwise specifications are TA = 25°C. VCC = CHARGE = 5V, CLAMP = 0V, unless otherwise noted. Individual25kΩ resistors tied from 5V VTRANS supply to RVTRANS, RVOUT, RDCM, unless otherwise noted. (Note 2)PARAMETERCONDITIONSMINTYPMAXUNITS UVLO1 Threshold Measured from Pin to GND l 1.195 1.225 1.255 V UVLO2 Threshold Measured from Pin to GND l 1.195 1.225 1.255 V OVLO1 Threshold Measured from Pin to GND l 1.195 1.225 1.255 V OVLO2 Threshold Measured from Pin to GND l 1.195 1.225 1.255 V Gate Minimum High Time 0.7 μs Gate Peak Pull-Up Current VCC = 5V, LVGATE Active 2.0 A VCC = 12V, LVGATE Inactive 1.5 A Gate Peak Pull-Down Current VCC = 5V, LVGATE Active 1.2 A VCC = 12V, LVGATE Inactive 1.5 A Gate Rise Time 10% → 90%, CGATE = 3.3nF (Note 8) VCC = 5V, LVGATE Active 40 ns VCC = 12V, LVGATE Inactive 55 ns Gate Fall Time 90% → 10%, CGATE = 3.3nF (Note 8) VCC = 5V, LVGATE Active 30 ns VCC = 12V, LVGATE Inactive 30 ns Gate High Voltage (Note 8): VCC = 5V, LVGATE Active 4.98 5 V VCC = 12V, LVGATE Inactive 10 10.5 11.5 V VCC = 12V, LVGATE Inactive, CLAMP Pin = 5V 5 5.6 6.5 V VCC = 24V, LVGATE Inactive 10 10.5 11.5 V Gate Turn-Off Propagation Delay CGATE = 3.3nF 180 ns 25mV Overdrive Applied to CSP Pin Gate Voltage Overshoot 500 mV CLAMP Pin Threshold 1.6 V Note 1: Stresses beyond those listed under Absolute Maximum Ratings Note 5: Refer to Block Diagram for VTRANS and VDRAIN definitions. may cause permanent damage to the device. Exposure to any Absolute Note 6: Low noise regulation of the output voltage requires a resistive Maximum Rating condition for extended periods may affect device voltage divider from output voltage to FB pin. FB pin should not be reliability and lifetime. grounded in this configuration. Refer to the Typical Application diagram for Note 2: The LT3751E is guaranteed to meet performance specifications proper FB pin configuration. from 0°C to 125°C junction temperature. Specifications over the –40°C Note 7: The feedback pin has built-in hysteresis that defines the boundary to 125°C operating junction temperature range are assured by design between charge-only mode and low noise regulation mode. characterization and correlation with statistical process controls. The Note 8: LVGATE should be used in parallel with HVGATE when V LT3751I is guaranteed over the full –40°C to 125°C operating junction CC is less than or equal to 8V (LVGATE active). When not in use, LVGATE should be temperature range. tied to VCC (LVGATE inactive). Note 3: A 60V internal clamp is connected to RVTRANS, RDCM, RVOUT, Note 9: Do not apply a positive or negative voltage or current source to UVLO1, UVLO2, OVLO1 and OVLO2. Resistors should be used such that HVGATE, otherwise permanent damage may occur. the pin currents do not exceed the Absolute Maximum Ratings. Note 4: Currents will increase as pin voltages are taken higher than the internal clamp voltage. 3751fd 4 For more information www.linear.com/LT3751 Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Operation Applications Information Typical Applications Package Description Revision History Typical Application Related Parts