Datasheet LT3751 (Analog Devices) - 10
| Fabricante | Analog Devices |
| Descripción | High Voltage Capacitor Charger Controller with Regulation |
| Páginas / Página | 34 / 10 — OPERATION. Figure 1. FB Pin Modes. CHARGE MODE. 1. Start-Up. 2. … |
| Formato / tamaño de archivo | PDF / 651 Kb |
| Idioma del documento | Inglés |
OPERATION. Figure 1. FB Pin Modes. CHARGE MODE. 1. Start-Up. 2. Primary-Side Charging. Figure 2. Idealized Charging Waveforms
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LT3751
OPERATION
The LT3751 can be used as either a fast, efficient high ILPRI voltage capacitor charger controller or as a high voltage, VTRANS – VDS(ON) low noise voltage regulator. The FB pin voltage determines IPK LPRI one of the three primary modes: charge mode, low noise regulation, or no-load operation (see Figure 1). FB PIN VOLTAGE ILSEC NO-LOAD OPERATION V 1.34V OUT + VDIODE IPK LSEC N REGULATION 1.16V CHARGE VPRI V MODE TRANS – VDS(ON) 0.0V 3751 F01
Figure 1. FB Pin Modes CHARGE MODE
–(VOUT + VDIODE) When the FB pin voltage is below 1.16V, the LT3751 acts N as a rapid capacitor charger. The charging operation has VSEC V four basic states for charge mode steady-state operation OUT + VDIODE (see Figure 2).
1. Start-Up
The first switching cycle is initiated approximately 2µs after the CHARGE pin is raised high. During this phase, –N (VTRANS – VDS(ON)) the start-up one-shot enables the master latch turning on the external NMOS and beginning the first switching VOUT + VDIODE V cycle. After start-up, the master latch will remain in the VDRAIN TRANS + N switching-enable state until the target output voltage is VTRANS reached or a fault condition occurs. The LT3751 utilizes circuitry to protect against trans- VDS(ON) V former primary current entering a runaway condition and DS(ON) remains in start-up mode until the DCM comparator has 3751 F02 1. 2. 3. enough headroom. Refer to the Start-Up Protection sec- PRIMARY-SIDE SECONDARY DISCONTINUOUS tion for more detail. CHARGING ENERGY TRANSFER MODE AND OUTPUT DETECTION DETECTION
2. Primary-Side Charging
When the NMOS switch latch is set, and depending on the
Figure 2. Idealized Charging Waveforms
use of LVGATE, the gate driver rapidly charges the gate pin to VCC – 2V in high voltage applications or directly to VCC in low voltage applications (refer to the Application 3751fd 10 For more information www.linear.com/LT3751 Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Operation Applications Information Typical Applications Package Description Revision History Typical Application Related Parts
OPERATION
The LT3751 can be used as either a fast, efficient high ILPRI voltage capacitor charger controller or as a high voltage, VTRANS – VDS(ON) low noise voltage regulator. The FB pin voltage determines IPK LPRI one of the three primary modes: charge mode, low noise regulation, or no-load operation (see Figure 1). FB PIN VOLTAGE ILSEC NO-LOAD OPERATION V 1.34V OUT + VDIODE IPK LSEC N REGULATION 1.16V CHARGE VPRI V MODE TRANS – VDS(ON) 0.0V 3751 F01
Figure 1. FB Pin Modes CHARGE MODE
–(VOUT + VDIODE) When the FB pin voltage is below 1.16V, the LT3751 acts N as a rapid capacitor charger. The charging operation has VSEC V four basic states for charge mode steady-state operation OUT + VDIODE (see Figure 2).
1. Start-Up
The first switching cycle is initiated approximately 2µs after the CHARGE pin is raised high. During this phase, –N (VTRANS – VDS(ON)) the start-up one-shot enables the master latch turning on the external NMOS and beginning the first switching VOUT + VDIODE V cycle. After start-up, the master latch will remain in the VDRAIN TRANS + N switching-enable state until the target output voltage is VTRANS reached or a fault condition occurs. The LT3751 utilizes circuitry to protect against trans- VDS(ON) V former primary current entering a runaway condition and DS(ON) remains in start-up mode until the DCM comparator has 3751 F02 1. 2. 3. enough headroom. Refer to the Start-Up Protection sec- PRIMARY-SIDE SECONDARY DISCONTINUOUS tion for more detail. CHARGING ENERGY TRANSFER MODE AND OUTPUT DETECTION DETECTION
2. Primary-Side Charging
When the NMOS switch latch is set, and depending on the
Figure 2. Idealized Charging Waveforms
use of LVGATE, the gate driver rapidly charges the gate pin to VCC – 2V in high voltage applications or directly to VCC in low voltage applications (refer to the Application 3751fd 10 For more information www.linear.com/LT3751 Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Operation Applications Information Typical Applications Package Description Revision History Typical Application Related Parts